A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

Helong Li; Stig Munk-Nielsen; Szymon Beczkowski; Xiongfei Wang

doi:10.1109/APEC.2016.7467948

A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

Helong Li, Stig Munk-Nielsen, Szymon Beczkowski, Xiongfei Wang

AAU Energi

Publikation: Bidrag til bog/antologi/rapport/konference proceeding › Konferenceartikel i proceeding › Forskning › peer review

3 Citationer (Scopus)

Abstract

This paper proposes a novel Direct Bonded Copper (DBC) layout for mitigating the current imbalance among the paralleled SiC MOSFET dies in multichip power modules. Compared to the traditional layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves the current sharing among the paralleled SiC MOSFET dies in power module. Mathematic analysis and circuit model of the DBC layout are presented to elaborate on the superior features of the proposed DBC layout. Simulation and experimental results further verify the theoretical analysis and current balancing performance of the proposed DBC layout.

Originalsprog	Engelsk
Titel	Proceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
Antal sider	5
Forlag	IEEE
Publikationsdato	mar. 2016
Sider	704-708
ISBN (Trykt)	978-1-4673-8393-6, 978-1-4673-9551-9
ISBN (Elektronisk)	978-1-4673-9550-2
DOI	https://doi.org/10.1109/APEC.2016.7467948
Status	Udgivet - mar. 2016
Begivenhed	2016 IEEE Applied Power Electronics Conference and Exposition (APEC) - Long Beach Convention and Entertainment Center, Long Beach, USA Varighed: 20 mar. 2016 → 24 mar. 2016 http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=32616

Konference

Konference	2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
Lokation	Long Beach Convention and Entertainment Center
Land/Område	USA
By	Long Beach
Periode	20/03/2016 → 24/03/2016
Internetadresse	http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=32616

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10.1109/APEC.2016.7467948

AUB Link

Søg efter materialet i Aalborg Universitetsbiblioteks søgemaskine

HARMONY: HARMONY - Harmonic identification, mitigation and control in power electronics based power systems
Blaabjerg, F., Bak, C. L., Wang, X., Beres, R. N., Kwon, J., Gui, Y., Yoon, C. & Ebrahimzadeh, E.
European Research Counsil
01/02/2013 → 28/02/2018
Projekter: Projekt › Forskning

Citationsformater

@inproceedings{53288e9ee3244063a5d804984c1c1383,

title = "A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules",

abstract = "This paper proposes a novel Direct Bonded Copper (DBC) layout for mitigating the current imbalance among the paralleled SiC MOSFET dies in multichip power modules. Compared to the traditional layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves the current sharing among the paralleled SiC MOSFET dies in power module. Mathematic analysis and circuit model of the DBC layout are presented to elaborate on the superior features of the proposed DBC layout. Simulation and experimental results further verify the theoretical analysis and current balancing performance of the proposed DBC layout.",

author = "Helong Li and Stig Munk-Nielsen and Szymon Beczkowski and Xiongfei Wang",

year = "2016",

month = mar,

doi = "10.1109/APEC.2016.7467948",

language = "English",

isbn = "978-1-4673-8393-6",

pages = "704--708",

booktitle = "Proceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC)",

publisher = "IEEE",

address = "United States",

note = "2016 IEEE Applied Power Electronics Conference and Exposition (APEC) ; Conference date: 20-03-2016 Through 24-03-2016",

url = "http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=32616",

}

Li, H, Munk-Nielsen, S , Beczkowski, S & Wang, X 2016, A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules. i Proceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE, s. 704-708, 2016 IEEE Applied Power Electronics Conference and Exposition (APEC), Long Beach, USA, 20/03/2016. https://doi.org/10.1109/APEC.2016.7467948

A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules. / Li, Helong; Munk-Nielsen, Stig ; Beczkowski, Szymon et al.
Proceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE, 2016. s. 704-708.

Publikation: Bidrag til bog/antologi/rapport/konference proceeding › Konferenceartikel i proceeding › Forskning › peer review

TY - GEN

T1 - A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

AU - Li, Helong

AU - Munk-Nielsen, Stig

AU - Beczkowski, Szymon

AU - Wang, Xiongfei

PY - 2016/3

Y1 - 2016/3

N2 - This paper proposes a novel Direct Bonded Copper (DBC) layout for mitigating the current imbalance among the paralleled SiC MOSFET dies in multichip power modules. Compared to the traditional layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves the current sharing among the paralleled SiC MOSFET dies in power module. Mathematic analysis and circuit model of the DBC layout are presented to elaborate on the superior features of the proposed DBC layout. Simulation and experimental results further verify the theoretical analysis and current balancing performance of the proposed DBC layout.

AB - This paper proposes a novel Direct Bonded Copper (DBC) layout for mitigating the current imbalance among the paralleled SiC MOSFET dies in multichip power modules. Compared to the traditional layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves the current sharing among the paralleled SiC MOSFET dies in power module. Mathematic analysis and circuit model of the DBC layout are presented to elaborate on the superior features of the proposed DBC layout. Simulation and experimental results further verify the theoretical analysis and current balancing performance of the proposed DBC layout.

U2 - 10.1109/APEC.2016.7467948

DO - 10.1109/APEC.2016.7467948

M3 - Article in proceeding

SN - 978-1-4673-8393-6

SN - 978-1-4673-9551-9

SP - 704

EP - 708

BT - Proceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC)

PB - IEEE

T2 - 2016 IEEE Applied Power Electronics Conference and Exposition (APEC)

Y2 - 20 March 2016 through 24 March 2016

ER -

A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

Abstract

Konference

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AUB Link

Fingeraftryk

Projekter

HARMONY: HARMONY - Harmonic identification, mitigation and control in power electronics based power systems

Citationsformater