TY - GEN
T1 - Design of the Trap Filter for the High Power Converters with Parallel Interleaved VSCs
AU - Gohil, Ghanshyamsinh Vijaysinh
AU - Bede, Lorand
AU - Teodorescu, Remus
AU - Kerekes, Tamas
AU - Blaabjerg, Frede
PY - 2014/11
Y1 - 2014/11
N2 - The power handling capability of the state-of-the-art semiconductor devices is limited. Therefore, the Voltage Source Converters (VSCs) are often connected in parallel to realize high power converter. The switching frequency semiconductor devices, used in the high power VSCs, is also limited. Therefore, large filter components are often required in order to meet the stringent grid code requirements imposed by the utility. As a result, the size, weight and cost of the overall system increase. The use of interleaved carriers of the parallel connected VSCs, along with the high order line filter, is proposed to reduce the value of the filter components. The theoretical harmonic spectrum of the average pole voltage of two interleaved VSCs is derived and the reduction in the magnitude of some of the harmonic components due to the carrier interleaving is demonstrated. A shunt LC trap branch is used to sink the dominant harmonic frequency components. The design procedure of the line filter is illustrated and the filter performance is also verified by performing the simulation and the experimental study.
AB - The power handling capability of the state-of-the-art semiconductor devices is limited. Therefore, the Voltage Source Converters (VSCs) are often connected in parallel to realize high power converter. The switching frequency semiconductor devices, used in the high power VSCs, is also limited. Therefore, large filter components are often required in order to meet the stringent grid code requirements imposed by the utility. As a result, the size, weight and cost of the overall system increase. The use of interleaved carriers of the parallel connected VSCs, along with the high order line filter, is proposed to reduce the value of the filter components. The theoretical harmonic spectrum of the average pole voltage of two interleaved VSCs is derived and the reduction in the magnitude of some of the harmonic components due to the carrier interleaving is demonstrated. A shunt LC trap branch is used to sink the dominant harmonic frequency components. The design procedure of the line filter is illustrated and the filter performance is also verified by performing the simulation and the experimental study.
KW - Voltage source converters (VSC)
KW - parallel
KW - interleaving
KW - Filter Design
KW - trap filter
KW - Parallel inverters
KW - integrated inductor
KW - wind turbine
KW - wind energy systems
KW - wind energy conversion system
KW - harmonic filter design
KW - harmonic filter
KW - LLCL filter
KW - LLCL-filter
KW - parallel interleaved inverters
KW - parallel interleaved converters
KW - High power converters
KW - Modulation scheme
KW - Phase-shifted carrier-based pulsewidth modulation (PSC-PWM)
KW - circulating current
KW - circulating current suppression
KW - coupled inductor
KW - circulating current control
KW - inter phase transformer
KW - inter cell transformer
U2 - 10.1109/IECON.2014.7048781
DO - 10.1109/IECON.2014.7048781
M3 - Article in proceeding
T3 - Proceedings of the Annual Conference of the IEEE Industrial Electronics Society
SP - 2030
EP - 2036
BT - Proceedings of the 40th Annual Conference of the IEEE Industrial Electronics Society, IECON 2014
PB - IEEE Press
T2 - 40th Annual Conference of IEEE Industrial Electronics Society
Y2 - 29 October 2014 through 1 November 2014
ER -