High Performance and Energy Efficient Traffic Light Controller Design Using FPGA

Sujeet Pandey, Vivek Kumar Shrivastav, Rashmi Sharma, Dil muhammed Akbar Hussain

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Abstract

In this work, Verilog is used as hardware description language for implementation of traffic light controller. It shows Red, Green and Yellow color at a predefined interval. Technology scaling is used as energy efficient technique. We have used 90nm, 65nm, 40nm and 28nm technology based FPGA and then we have analyzed power consumption for traffic light controller on different FPGA. Leakage power is in range of 97.5-99% of total power consumption by traffic light controller on Virtex-7 FPGA. Signal power, clock power and IOs power are almost negligible. Power dissipation is measured on XPOWER simulator.
OriginalsprogEngelsk
TidsskriftGyancity Journal of Engineering and Technology
Vol/bind3
Udgave nummer2
Sider (fra-til)9-16
Antal sider8
ISSN2456-0065
StatusUdgivet - jul. 2017

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