Hybrid Synchronous/Stationary Reference Frame Filtering based PLL

Saeed Golestan, Josep M. Guerrero, Abdullah Abusorrah, Yusuf Al-Turki

Publikation: Bidrag til tidsskriftTidsskriftartikelForskningpeer review

53 Citationer (Scopus)
505 Downloads (Pure)

Abstract

Designing an effective phase-locked loop (PLL) for three-phase applications is the objective of this paper. The designed PLL structure is able to provide an accurate estimation of grid voltage frequency and phase even in the presence of all harmonic components of both positive and negative sequences and dc offset in its input. It addition to offer a high disturbance rejection capability, the suggested PLL structure has a fast transient response and provides a settling time of around two cycles of fundamental frequency. The effectiveness of suggested PLL structure is confirmed using numerical results.
OriginalsprogEngelsk
TidsskriftI E E E Transactions on Industrial Electronics
Vol/bind62
Udgave nummer8
Sider (fra-til)5018 - 5022
Antal sider5
ISSN0278-0046
DOI
StatusUdgivet - 2015

Fingeraftryk

Dyk ned i forskningsemnerne om 'Hybrid Synchronous/Stationary Reference Frame Filtering based PLL'. Sammen danner de et unikt fingeraftryk.

Citationsformater