Line reactor for parallel-interleaved high power inverters

Ionut Trintis, Ghanshyamsinh Gohil, Markus Wurzer, Mikael Franzen, Stig Lund Pallesgaard, Stig Munk-Nielsen, Philip Carne Kjaer

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7 Citationer (Scopus)

Abstract

In this paper the line reactor design for parallel connection of high power inverters with interleaved carriers is presented. Based on state of the art interleaving reactors configurations and based on high power requirements, design iterations are performed to detect the implementation issues. The parasitic effects are highlighted in finite element models and a new reluctance model is introduced. Experimental results are presented to support the findings from the simulations. Guidelines for future designs are highlighted with focus on parameter stability and efficiency.

OriginalsprogEngelsk
Titel2017 19th European Conference on Power Electronics and Applications, EPE 2017 ECCE Europe
Vol/bind2017-January
ForlagIEEE
Publikationsdato6 nov. 2017
Artikelnummer8099257
ISBN (Elektronisk)9789075815276
DOI
StatusUdgivet - 6 nov. 2017
Begivenhed19th European Conference on Power Electronics and Applications, EPE 2017 ECCE Europe - Warsaw, Polen
Varighed: 11 sep. 201714 sep. 2017

Konference

Konference19th European Conference on Power Electronics and Applications, EPE 2017 ECCE Europe
Land/OmrådePolen
ByWarsaw
Periode11/09/201714/09/2017

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