Network Coding Parallelization Based on Matrix Operations for Multicore Architectures

Network coding has the potential to improve the performance of current and future communication systems (including transportation and storage) and is currently even considered for communication architectures between the individual processors on same board or different boards in close proximity. Despite the fact that single core implementations show already comparable coding speeds with standard coding approaches, this paper pushes network coding to the next level by exploiting multicore architectures. The disruptive idea presented in the paper is to break with current software implementations and coding approaches and to adopt highly optimized dense matrix operations from the high performance computation field for network coding in order to increase the coding speed. The paper presents the novel coding approach for multicore architectures and shows coding speed gains on a commercial platform such as the Raspberry Pi2 with four cores in the order of up to one full magnitude. The speed increase gain is even higher than the number of cores of the Raspberry Pi2 since the newly introduced approach exploits the cache architecture way better than by-the-book matrix operations. Copyright © 2015 by the Institute of Electrical and Electronic Engineers, Inc.
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