TY - GEN
T1 - A ZVS PWM control strategy with balanced capacitor current for half-bridge three-level DC/DC converter
AU - Liu, Dong
AU - Deng, Fujin
AU - Chen, Zhe
PY - 2017/3
Y1 - 2017/3
N2 - The capacitor current would be imbalanced under the conventional control strategy in the half-bridge three-level (HBTL) DC/DC converter due to the effect of the output inductance of the power supply and the input line inductance, which would affect the converter's reliability. This paper proposes a pulse-wide modulation (PWM) strategy composed of two operation modes for the HBTL DC/DC converter, which can realize the zero-voltage switching (ZVS) for the efficiency improvement. In addition, a capacitor current balancing control is proposed by alternating the two operation modes of the proposed ZVS PWM strategy, which can eliminate the current imbalance among the two input capacitors. Therefore, the proposed control strategy can improve the converter's performance and reliability in: 1) reducing the switching losses and noises of the power switches; 2) balancing the thermal stresses and lifetimes among the two input capacitors. Finally, the simulation and experimental results are presented to verify the proposed control strategy.
AB - The capacitor current would be imbalanced under the conventional control strategy in the half-bridge three-level (HBTL) DC/DC converter due to the effect of the output inductance of the power supply and the input line inductance, which would affect the converter's reliability. This paper proposes a pulse-wide modulation (PWM) strategy composed of two operation modes for the HBTL DC/DC converter, which can realize the zero-voltage switching (ZVS) for the efficiency improvement. In addition, a capacitor current balancing control is proposed by alternating the two operation modes of the proposed ZVS PWM strategy, which can eliminate the current imbalance among the two input capacitors. Therefore, the proposed control strategy can improve the converter's performance and reliability in: 1) reducing the switching losses and noises of the power switches; 2) balancing the thermal stresses and lifetimes among the two input capacitors. Finally, the simulation and experimental results are presented to verify the proposed control strategy.
KW - Capacitor current balance
KW - DC/DC three-level converter
KW - Zero-voltage-switching (ZVS)
UR - http://www.scopus.com/inward/record.url?scp=85019988082&partnerID=8YFLogxK
U2 - 10.1109/APEC.2017.7930710
DO - 10.1109/APEC.2017.7930710
M3 - Article in proceeding
AN - SCOPUS:85019988082
T3 - IEEE Applied Power Electronics Conference and Exposition (APEC)
SP - 307
EP - 314
BT - Proceedings of the 2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
PB - IEEE Press
T2 - 2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
Y2 - 26 March 2017 through 30 March 2017
ER -