Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters

Ghanshyamsinh Vijaysinh Gohil; Lorand Bede; Remus Teodorescu; Tamas Kerekes; Frede Blaabjerg

doi:10.1109/ECCE.2016.7855089

Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters

Ghanshyamsinh Vijaysinh Gohil, Lorand Bede, Remus Teodorescu, Tamas Kerekes, Frede Blaabjerg

AAU Energy

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

8 Citations (Scopus)

Abstract

Two-level Voltage Source Converters (VSCs) are often connected in parallel to achieve desired current rating in multi-megawatt Wind Energy Conversion System (WECS). A multi-level converter can be realized by interleaving the carrier signals of the parallel VSCs. As a result, the harmonic perfor-mance of the WECS can be significantly improved. However, the interleaving of the carrier signals may lead to the flow of circulating current between parallel VSCs and it is highly desirable to avoid/suppress this unwanted circulating current. A comparative evaluation of the different methods to avoid/suppress the circulating current between the parallel interleaved VSCs is presented in this paper. The losses and the volume of the inductive components and the semiconductor losses are evaluated for the WECS with different circulating current suppression methods. Multi-objective optimizations of the inductive components have been also carried out. The design solutions, that are obtained using the optimization, have been compared on the basis of the volume of the inductive components and yearly energy loss for a given mission profile.

Original language	English
Title of host publication	Proceedings of 8th IEEE Energy Conversion Congress and Exposition (ECCE), 2016
Number of pages	8
Publisher	IEEE Press
Publication date	Sept 2016
ISBN (Electronic)	978-1-5090-0737-0
DOIs	https://doi.org/10.1109/ECCE.2016.7855089
Publication status	Published - Sept 2016
Event	8th Annual IEEE Energy Conversion Congress & Exposition: ECCE 2016 - Milwaukee, WI, United States Duration: 18 Sept 2016 → 22 Sept 2016 http://www.ieee-ecce.org/

Conference

Conference	8th Annual IEEE Energy Conversion Congress & Exposition
Country/Territory	United States
City	Milwaukee, WI
Period	18/09/2016 → 22/09/2016
Sponsor	IEEE, IEEE Industry Applications Society (IAS), IEEE Power Electronics and Industry Applications Societies (PELS)
Internet address	http://www.ieee-ecce.org/

Keywords

Voltage source converters (VSC)
Coupled inductor
Circulating current
Multi-objective optimization
Harmonic filter
Interleaving

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Cite this

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title = "Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters",

abstract = "Two-level Voltage Source Converters (VSCs) are often connected in parallel to achieve desired current rating in multi-megawatt Wind Energy Conversion System (WECS). A multi-level converter can be realized by interleaving the carrier signals of the parallel VSCs. As a result, the harmonic perfor-mance of the WECS can be significantly improved. However, the interleaving of the carrier signals may lead to the flow of circulating current between parallel VSCs and it is highly desirable to avoid/suppress this unwanted circulating current. A comparative evaluation of the different methods to avoid/suppress the circulating current between the parallel interleaved VSCs is presented in this paper. The losses and the volume of the inductive components and the semiconductor losses are evaluated for the WECS with different circulating current suppression methods. Multi-objective optimizations of the inductive components have been also carried out. The design solutions, that are obtained using the optimization, have been compared on the basis of the volume of the inductive components and yearly energy loss for a given mission profile.",

keywords = "Voltage source converters (VSC), Coupled inductor, Circulating current, Multi-objective optimization, Harmonic filter, Interleaving",

author = "Gohil, {Ghanshyamsinh Vijaysinh} and Lorand Bede and Remus Teodorescu and Tamas Kerekes and Frede Blaabjerg",

year = "2016",

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doi = "10.1109/ECCE.2016.7855089",

language = "English",

booktitle = "Proceedings of 8th IEEE Energy Conversion Congress and Exposition (ECCE), 2016",

publisher = "IEEE Press",

note = " 8th Annual IEEE Energy Conversion Congress & Exposition : ECCE 2016, ECCE 2016 ; Conference date: 18-09-2016 Through 22-09-2016",

url = "http://www.ieee-ecce.org/",

}

Gohil, GV, Bede, L, Teodorescu, R , Kerekes, T & Blaabjerg, F 2016, Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters. in Proceedings of 8th IEEE Energy Conversion Congress and Exposition (ECCE), 2016. IEEE Press, 8th Annual IEEE Energy Conversion Congress & Exposition, Milwaukee, WI, United States, 18/09/2016. https://doi.org/10.1109/ECCE.2016.7855089

Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters. / Gohil, Ghanshyamsinh Vijaysinh; Bede, Lorand; Teodorescu, Remus et al.
Proceedings of 8th IEEE Energy Conversion Congress and Exposition (ECCE), 2016. IEEE Press, 2016.

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

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T1 - Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters

AU - Gohil, Ghanshyamsinh Vijaysinh

AU - Bede, Lorand

AU - Teodorescu, Remus

AU - Kerekes, Tamas

AU - Blaabjerg, Frede

PY - 2016/9

Y1 - 2016/9

N2 - Two-level Voltage Source Converters (VSCs) are often connected in parallel to achieve desired current rating in multi-megawatt Wind Energy Conversion System (WECS). A multi-level converter can be realized by interleaving the carrier signals of the parallel VSCs. As a result, the harmonic perfor-mance of the WECS can be significantly improved. However, the interleaving of the carrier signals may lead to the flow of circulating current between parallel VSCs and it is highly desirable to avoid/suppress this unwanted circulating current. A comparative evaluation of the different methods to avoid/suppress the circulating current between the parallel interleaved VSCs is presented in this paper. The losses and the volume of the inductive components and the semiconductor losses are evaluated for the WECS with different circulating current suppression methods. Multi-objective optimizations of the inductive components have been also carried out. The design solutions, that are obtained using the optimization, have been compared on the basis of the volume of the inductive components and yearly energy loss for a given mission profile.

AB - Two-level Voltage Source Converters (VSCs) are often connected in parallel to achieve desired current rating in multi-megawatt Wind Energy Conversion System (WECS). A multi-level converter can be realized by interleaving the carrier signals of the parallel VSCs. As a result, the harmonic perfor-mance of the WECS can be significantly improved. However, the interleaving of the carrier signals may lead to the flow of circulating current between parallel VSCs and it is highly desirable to avoid/suppress this unwanted circulating current. A comparative evaluation of the different methods to avoid/suppress the circulating current between the parallel interleaved VSCs is presented in this paper. The losses and the volume of the inductive components and the semiconductor losses are evaluated for the WECS with different circulating current suppression methods. Multi-objective optimizations of the inductive components have been also carried out. The design solutions, that are obtained using the optimization, have been compared on the basis of the volume of the inductive components and yearly energy loss for a given mission profile.

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KW - Coupled inductor

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KW - Multi-objective optimization

KW - Harmonic filter

KW - Interleaving

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DO - 10.1109/ECCE.2016.7855089

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BT - Proceedings of 8th IEEE Energy Conversion Congress and Exposition (ECCE), 2016

PB - IEEE Press

T2 - 8th Annual IEEE Energy Conversion Congress & Exposition

Y2 - 18 September 2016 through 22 September 2016

ER -

Evaluation of Circulating Current Suppression Methods for Parallel Interleaved Inverters

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