Abstract
The quadrature signal generation based phase-locked loops (QSG-PLLs) are highly popular for synchronization purposes in single-phase systems. The main difference among these PLLs often lies in the technique they use for creating the fictitious quadrature component. One of the easiest QSG approaches is delaying the original single-phase signal by a quarter of a cycle. The PLL with such QSG technique is often called the transfer delay based PLL (TD-PLL). The TD-PLL benefits from a simple structure, rather fast dynamic response, and a good detection accuracy when the grid frequency is at its nominal value, but it suffers from a phase offset error and double frequency oscillatory error in the estimated phase and frequency in the presence of frequency drifts. In this paper, a simple yet effective approach to remove the aforementioned errors of the TD-PLL is proposed. The resultant PLL structure is called the adaptive TD-PLL (ATD-PLL). The stability of the ATD-PLL is evaluated by the derivation of its small-signal model. Parameter design guidelines are also presented. Finally, the effectiveness of the ATD-PLL is confirmed using numerical results.
Original language | English |
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Journal | IEEE Transactions on Industrial Electronics |
Volume | 64 |
Issue number | 4 |
Pages (from-to) | 2848 - 2854 |
Number of pages | 7 |
ISSN | 0278-0046 |
DOIs | |
Publication status | Published - Apr 2017 |
Keywords
- Phase locked loop (PLL)
- Synchronisation
- Single phase systems
- Grid connected converter