Lifetime prediction of high-power press-pack IGBTs in wind power applications

Research output: ResearchPh.D. thesis

Abstract

The Wind Turbine (WT) industry is advancing at a rapid pace and the power rating of new WTs is continuously growing. The next generation large WTs are likely to be realized with full-scale power converters due to the advantages they offer in terms of grid code compliance, power density and decoupling of the generator and grid sides. Press-Pack (PP) Insulated Gate Bipolar Transistors (IGBTs) are promising semiconductor devices for the next generation large WTs due to the advantages they offer in terms of power capability, power density and thermal cycling capability. PP IGBTs require proper mechanical clamping in order to ensure even clamping force distribution among the chips. Since clamping force is linked to both thermal contact resistance and electrical contact resistance, even clamping force distribution among the chips ensures even loading of the chips and maximized reliability if the chip characteristics have been properly matched.

In this PhD project the effect of mechanical clamping conditions on the chip-level thermal cycling and chip-level lifetime of PP IGBTs in wind power applications is investigated. This is achieved through co-simulation of a number of different models developed for the studied open-capsule PP IGBT. First, a 3D FEM based clamping force distribution model which is able to translate mechanical clamping conditions into chip-level clamping forces is developed. Next, a 3D FEM based dynamic thermal model which is able to calculate the chip-level thermal impedances by taking into account chip-level clamping forces is developed. The chip-level power loss models are implemented in the form of look-up tables which take into consideration voltage, current and temperature.

In order to predict the lifetime at chip-level the developed models are implemented in a circuit simulator where the working conditions from within a WT power converter are emulated. Based on a realistic WT Mission Profile (MP) which is given in the form of electrical power versus time, the chip-level junction temperatures (curves) are calculated first. The circuit simulator model considers the balancing effect of the temperature dependent on-state characteristics of the Si chips. Next, the number and magnitude of the thermal cycles from the temperature curves are extracted by using the rain-flow counting algorithm. In the end, the chip-level lifetimes are calculated based on the accelerated test data provided by IXYS WESTCODE UK for the chips used in the open-capsule PP IGBT.

A test setup employing a stack with 2 PP IGBTs and 3 cooling plates is developed in order to validate to some extent the developed models. The clamping force distribution model is validated under ideal mechanical clamping conditions by using pressure sensitive paper. The current distribution among the chips is also measured under ideal clamping conditions.

The main conclusions can be summarized as follows:
Mechanical clamping conditions affect the clamping force distribution among the chips in PP IGBTs in various ways. The misalignment of the PP IGBT in the clamp and the use of a smaller diameter spacer disc have a relatively small effect on the clamping force distribution. The variation in the thickness of chip assemblies has a strong effect on the clamping force distribution.
In terms of chip-level thermal impedance distribution, the misalignment of the PP IGBT in the clamp has a small effect due to the small variation in the clamping forces. The variation in the thickness of chip assemblies has a quite strong effect on the chip-level thermal impedance distribution.
In terms of chip-level thermal cycling the mechanical clamping conditions seems to have a small effect due to the compensation effect of the temperature dependent on-state characteristics of the Si chips. However, it must be considered that these thermal cycling occurs at different clamping forces. In the investigated WT like application seems that most of the thermal cycling occurs with thermal excursions lower than 10 ⁰C.
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Details

The Wind Turbine (WT) industry is advancing at a rapid pace and the power rating of new WTs is continuously growing. The next generation large WTs are likely to be realized with full-scale power converters due to the advantages they offer in terms of grid code compliance, power density and decoupling of the generator and grid sides. Press-Pack (PP) Insulated Gate Bipolar Transistors (IGBTs) are promising semiconductor devices for the next generation large WTs due to the advantages they offer in terms of power capability, power density and thermal cycling capability. PP IGBTs require proper mechanical clamping in order to ensure even clamping force distribution among the chips. Since clamping force is linked to both thermal contact resistance and electrical contact resistance, even clamping force distribution among the chips ensures even loading of the chips and maximized reliability if the chip characteristics have been properly matched.

In this PhD project the effect of mechanical clamping conditions on the chip-level thermal cycling and chip-level lifetime of PP IGBTs in wind power applications is investigated. This is achieved through co-simulation of a number of different models developed for the studied open-capsule PP IGBT. First, a 3D FEM based clamping force distribution model which is able to translate mechanical clamping conditions into chip-level clamping forces is developed. Next, a 3D FEM based dynamic thermal model which is able to calculate the chip-level thermal impedances by taking into account chip-level clamping forces is developed. The chip-level power loss models are implemented in the form of look-up tables which take into consideration voltage, current and temperature.

In order to predict the lifetime at chip-level the developed models are implemented in a circuit simulator where the working conditions from within a WT power converter are emulated. Based on a realistic WT Mission Profile (MP) which is given in the form of electrical power versus time, the chip-level junction temperatures (curves) are calculated first. The circuit simulator model considers the balancing effect of the temperature dependent on-state characteristics of the Si chips. Next, the number and magnitude of the thermal cycles from the temperature curves are extracted by using the rain-flow counting algorithm. In the end, the chip-level lifetimes are calculated based on the accelerated test data provided by IXYS WESTCODE UK for the chips used in the open-capsule PP IGBT.

A test setup employing a stack with 2 PP IGBTs and 3 cooling plates is developed in order to validate to some extent the developed models. The clamping force distribution model is validated under ideal mechanical clamping conditions by using pressure sensitive paper. The current distribution among the chips is also measured under ideal clamping conditions.

The main conclusions can be summarized as follows:
Mechanical clamping conditions affect the clamping force distribution among the chips in PP IGBTs in various ways. The misalignment of the PP IGBT in the clamp and the use of a smaller diameter spacer disc have a relatively small effect on the clamping force distribution. The variation in the thickness of chip assemblies has a strong effect on the clamping force distribution.
In terms of chip-level thermal impedance distribution, the misalignment of the PP IGBT in the clamp has a small effect due to the small variation in the clamping forces. The variation in the thickness of chip assemblies has a quite strong effect on the chip-level thermal impedance distribution.
In terms of chip-level thermal cycling the mechanical clamping conditions seems to have a small effect due to the compensation effect of the temperature dependent on-state characteristics of the Si chips. However, it must be considered that these thermal cycling occurs at different clamping forces. In the investigated WT like application seems that most of the thermal cycling occurs with thermal excursions lower than 10 ⁰C.
Original languageEnglish
PublisherDepartment of Energy Technology, Aalborg University
Number of pages112
ISBN (Print)978-87-92846-59-4
StatePublished - 2013
Publication categoryResearch
ID: 183438758