Near-Field Characterization of a Printed Circuit Board in the Presence of a Finite-sized Metallic Ground Plane
Publication: Research - peer-review › Article in proceeding
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Near-Field Characterization of a Printed Circuit Board in the Presence of a Finite-sized Metallic Ground Plane. / Franek, Ondrej; Sørensen, Morten (External Author); Ebert, Hans; Pedersen, Gert Frølund.
PIERS 2012 Kuala Lumpur Proceedings. The Electromagnetics Academy, 2012. p. 1146-1149 (PIERS Proceedings).Publication: Research - peer-review › Article in proceeding
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TY - GEN
T1 - Near-Field Characterization of a Printed Circuit Board in the Presence of a Finite-sized Metallic Ground Plane
A1 - Franek,Ondrej
A1 - Ebert,Hans
A1 - Pedersen,Gert Frølund
AU - Franek,Ondrej
AU - Ebert,Hans
AU - Pedersen,Gert Frølund
A2 - Sørensen,Morten
ED - Sørensen,Morten
PB - The Electromagnetics Academy
PY - 2012
Y1 - 2012
N2 - Model of a generic printed circuit board (PCB) in a presence of a finite-sized<br/>metallic ground plane is introduced as a commonly occurring scenario of electronic module whose electromagnetic fields are disturbed by a nearby object. Finite-difference time-domain simulations are performed for this scenario and a scenario where the PCB is replaced by near field sources following Love's equivalence theorem. Both scenarios are compared and the maximum total error is evaluated as 84%. It is then demonstrated that including the bottom metallic layer of the PCB,<br/>as its characteristic feature, in the latter scenario leads to significantly lower errors - a figure of 33% is reported.
AB - Model of a generic printed circuit board (PCB) in a presence of a finite-sized<br/>metallic ground plane is introduced as a commonly occurring scenario of electronic module whose electromagnetic fields are disturbed by a nearby object. Finite-difference time-domain simulations are performed for this scenario and a scenario where the PCB is replaced by near field sources following Love's equivalence theorem. Both scenarios are compared and the maximum total error is evaluated as 84%. It is then demonstrated that including the bottom metallic layer of the PCB,<br/>as its characteristic feature, in the latter scenario leads to significantly lower errors - a figure of 33% is reported.
KW - electromagnetic compatibility
UR - http://piers.org/piersproceedings/download.php?file=cGllcnMyMDEyS3VhbGFMdW1wdXJ8M0E2XzExNDYucGRmfDExMTAyMDEyMTYxMg==
UR - http://piers.org/piersproceedings/piers2012KualalumpurProc.php?start=200
SN - 978-1-934142-20-2
BT - PIERS 2012 Kuala Lumpur Proceedings
T2 - PIERS 2012 Kuala Lumpur Proceedings
T3 - PIERS Proceedings
T3 - en_GB
SP - 1146
EP - 1149
ER -