A 32×32 smart photo-array with minimum-size FGMOS for amplification and FPN reduction

G. Fikos, Lazaros Nalpantidis, S. Siskos

    Publikation: Bidrag til bog/antologi/rapport/konference proceedingBidrag til bog/antologiForskningpeer review

    1 Citationer (Scopus)
    OriginalsprogEngelsk
    TitelIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
    Antal sider5
    Vol/bind2005
    Publikationsdato1 jan. 2005
    Sider199-203
    ISBN (Trykt)0780393341, 978-078039334-9
    DOI
    StatusUdgivet - 1 jan. 2005

    Emneord

    • Capacitors; CMOS integrated circuits; Noise abatement; Photoelectric cells; Control gate capacitors; Fixed Pattern Noise (FPN); Floating-gate mosfets (FGMOS); Logarithmic response photoarrays; MOS devices

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