A Carrier Synchronization Method for Global Synchronous Pulse Width Modulation Application Using Phase-Locked-Loop

Tao Xu, Feng Gao, Xiongfei Wang, Frede Blaabjerg

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Resumé

When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high frequency harmonics will accumulate randomly at the Point of Common Coupling (PCC). Global synchronous pulse width modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method.
OriginalsprogEngelsk
Artikelnummer8634934
TidsskriftIEEE Transactions on Power Electronics
Vol/bind34
Udgave nummer11
Sider (fra-til)10720 - 10732
Antal sider13
ISSN0885-8993
DOI
StatusUdgivet - nov. 2019

Fingerprint

Phase locked loops
Pulse width modulation
Synchronization
Communication systems
Hardware
Costs

Emneord

  • Synchronization
  • Inverters
  • Power harmonic filters
  • Harmonic analysis
  • Pulse width modulation
  • Communication systems
  • Phase locked loops
  • Carrier synchronization method
  • global synchronous pulse width modulation
  • phase locked loop
  • distributed inverters

Citer dette

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title = "A Carrier Synchronization Method for Global Synchronous Pulse Width Modulation Application Using Phase-Locked-Loop",
abstract = "When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high frequency harmonics will accumulate randomly at the Point of Common Coupling (PCC). Global synchronous pulse width modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method.",
keywords = "Synchronization, Inverters, Power harmonic filters, Harmonic analysis, Pulse width modulation, Communication systems, Phase locked loops, Carrier synchronization method, global synchronous pulse width modulation, phase locked loop, distributed inverters, Carrier synchronization (CS) method, Distributed inverters, Global synchronous pulsewidth modulation (GSPW), Phase-locked loop (PLL)",
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A Carrier Synchronization Method for Global Synchronous Pulse Width Modulation Application Using Phase-Locked-Loop. / Xu, Tao; Gao, Feng; Wang, Xiongfei; Blaabjerg, Frede.

I: IEEE Transactions on Power Electronics, Bind 34, Nr. 11, 8634934, 11.2019, s. 10720 - 10732.

Publikation: Bidrag til tidsskriftTidsskriftartikelForskningpeer review

TY - JOUR

T1 - A Carrier Synchronization Method for Global Synchronous Pulse Width Modulation Application Using Phase-Locked-Loop

AU - Xu, Tao

AU - Gao, Feng

AU - Wang, Xiongfei

AU - Blaabjerg, Frede

PY - 2019/11

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N2 - When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high frequency harmonics will accumulate randomly at the Point of Common Coupling (PCC). Global synchronous pulse width modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method.

AB - When many distributed parallel inverters are integrated into grid without switching sequence coordinated control capability, the high frequency harmonics will accumulate randomly at the Point of Common Coupling (PCC). Global synchronous pulse width modulation (GSPWM) method can significantly attenuate the accumulated switching ripples by intentionally assuming an intelligent optimization algorithm and a communication system. To avoid the dependence on low-latency communication system, this paper proposes a novel phase locked loop based PWM carrier synchronization (PLL-CS) method for GSPWM system, where the switching sequences can be effectively synchronized as expected without using low-latency synchronization signals. By doing so, the operational reliability of the whole GSPWM system can be significantly improved while the additional hardware cost of GSPWM can be dramatically reduced, which can enhance the implementation adaptability of GSPWM method. Experimental results have verified the performance of the proposed PLL-CS GSPWM method.

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