TY - JOUR
T1 - A New Modulation to Eliminate the Impact of Overlap Time for Three-Phase Current Source Converters
AU - Ding, Hao
AU - Guo, Xiaoqiang
AU - He, Meiling
AU - Shi, Changli
AU - Jia, Dongqiang
AU - Chen, Chao
AU - Guerrero, Josep M.
N1 - Funding Information:
This work was supported in part by the National Key R&D Program of China under Grant 2022YFE0102500, in part by the National Natural Science Foundation of China (No.61903321) and Youth Foundation of Hebei Province Education Department (No.QN2019016).
Publisher Copyright:
© 2022, The Author(s) under exclusive licence to The Korean Institute of Electrical Engineers.
PY - 2022/9
Y1 - 2022/9
N2 - Three-phase current source converter tends to be attractive in future industrial applications. In order to ensure the continuous current for the dc-link inductor of the current source converter (CSC), an overlap time is mandatory for each switch, so as to avoid the over-voltage spike caused by the dc-link inductor current interruption. However, the overlap time results in the undesirable harmonics and current distortion, which fails to comply with the relevant IEEE Standard in terms of power quality. Especially, the negative influence caused by overlap time effect is much more serious with the increasing of the switching frequency applied to CSC. In order to solve the problem, the impact of the overlap time on the CSC is investigated, and the error resulted from the overlap time is clearly demonstrated. Based on the pulse equivalent principle and the Fourier analysis, the quantitative relationship between the current harmonic and the overlap time is obtained. And then, a new approach to eliminate the impact of overlap time on the CSC is proposed. Finally, the simulation and experimental results are carried out to verify the effectiveness of the proposed solution.
AB - Three-phase current source converter tends to be attractive in future industrial applications. In order to ensure the continuous current for the dc-link inductor of the current source converter (CSC), an overlap time is mandatory for each switch, so as to avoid the over-voltage spike caused by the dc-link inductor current interruption. However, the overlap time results in the undesirable harmonics and current distortion, which fails to comply with the relevant IEEE Standard in terms of power quality. Especially, the negative influence caused by overlap time effect is much more serious with the increasing of the switching frequency applied to CSC. In order to solve the problem, the impact of the overlap time on the CSC is investigated, and the error resulted from the overlap time is clearly demonstrated. Based on the pulse equivalent principle and the Fourier analysis, the quantitative relationship between the current harmonic and the overlap time is obtained. And then, a new approach to eliminate the impact of overlap time on the CSC is proposed. Finally, the simulation and experimental results are carried out to verify the effectiveness of the proposed solution.
KW - Current source converter
KW - Harmonics
KW - Overlap time
KW - Space vector modulation
UR - http://www.scopus.com/inward/record.url?scp=85128481462&partnerID=8YFLogxK
U2 - 10.1007/s42835-022-01083-6
DO - 10.1007/s42835-022-01083-6
M3 - Journal article
AN - SCOPUS:85128481462
SN - 1975-0102
VL - 17
SP - 2815
EP - 2828
JO - Journal of Electrical Engineering and Technology
JF - Journal of Electrical Engineering and Technology
IS - 5
ER -