TY - JOUR
T1 - A New Three-Phase Multi-Level Asymmetrical Inverter With Optimum Hardware Components
AU - Chittathuru, Dhanamjayulu
AU - Kaliannan, Palanisamy
AU - Padmanaban, Sanjeevikumar
AU - Maroti, Pandav Kiran
AU - Holm-Nielsen, Jens Bo
PY - 2020
Y1 - 2020
N2 - In this article, a novel three-phase asymmetrical multilevel inverter is presented. The proposed inverter is designed with an optimal hardware components to generate three-phase nineteen output voltage levels. The proposed inverter exhibits various advantages like a suitable output voltage waveform with improved power quality, lower total harmonic distortion (THD), and more moderate complexity, reduction in cost, reduced power losses, and improved efficiency. A comparison of the proposed topology in terms of several parameters with existing methods illustrates its merits and features. The proposed inverter tested with steady-state and dynamic load disturbances. Various experimental results are included in this article to validate the performance of the proposed inverter during various extremities. In addition, a detailed comparison is tabulated between simulation and experimental results graphically. The proposed inverter has been stable even during load disturbance conditions. The simulation and feasibility model are verified using a prototype model.
AB - In this article, a novel three-phase asymmetrical multilevel inverter is presented. The proposed inverter is designed with an optimal hardware components to generate three-phase nineteen output voltage levels. The proposed inverter exhibits various advantages like a suitable output voltage waveform with improved power quality, lower total harmonic distortion (THD), and more moderate complexity, reduction in cost, reduced power losses, and improved efficiency. A comparison of the proposed topology in terms of several parameters with existing methods illustrates its merits and features. The proposed inverter tested with steady-state and dynamic load disturbances. Various experimental results are included in this article to validate the performance of the proposed inverter during various extremities. In addition, a detailed comparison is tabulated between simulation and experimental results graphically. The proposed inverter has been stable even during load disturbance conditions. The simulation and feasibility model are verified using a prototype model.
U2 - 10.1109/ACCESS.2020.3039831
DO - 10.1109/ACCESS.2020.3039831
M3 - Journal article
SN - 2169-3536
VL - 8
SP - 212515
EP - 212528
JO - IEEE Access
JF - IEEE Access
ER -