Abstract
With the rapid growth of new wireless communication standards, a solution that is able to provide a seamless shift between existing wireless protocols and high flexibility as well as capacity is crucial. Software Defined Radio (SDR) technology offers this flexibility. It gives the possibility of adapting the radio to users’ preferences and the operating environment and supporting multiple standards without requiring separate hardware for each standard. In order to avail this enabling technology that is applicable across a wide range of areas within the wireless infrastructure, these radios have to propose cryptographic services such as confidentiality, integrity and authentication. Therefore, integration of security services into SDR devices is essential.
Authenticated Encryption schemes donate the class of cryptographic algorithms that are designed for protecting both message confidentiality and its authenticity. Traditionally, authenticated encryption was achieved by using two independent algorithms for encryption and authentication. For past few years, new modes of operation of block cipher have been developed that allow us to use one algorithm for encryption as well as authentication. This makes authenticated encryption very attractive for low-cost low-power hardware implementations, as it allows for the substantial decrease in the circuit area and power consumed compared to the traditional schemes.
In this thesis, an authenticated encryption scheme is proposed with the focus of achieving high throughput and low overhead for SDRs. The thesis is divided into two research topics. One topic is the design of a 1-pass authenticated encryption scheme that can accomplish both message secrecy and authenticity in a single cryptographic primitive. The other topic is the implementation of this design on re-configurable hardware in SDRs by closely observing the trade-off between area/throughput performance parameters.
For test and performance evaluation the design has been implemented in Xilinx Spartan – 3 sxc3s700an FPGA. The resulting implementation consumes moderate number of slices on FPGA and achieves throughput in the range of 0.8 Gbps which can be suitably used for SDR applications. Comparing with traditional two pass approaches, the presented design demonstrates high throughput and small area to performance ratio.
Authenticated Encryption schemes donate the class of cryptographic algorithms that are designed for protecting both message confidentiality and its authenticity. Traditionally, authenticated encryption was achieved by using two independent algorithms for encryption and authentication. For past few years, new modes of operation of block cipher have been developed that allow us to use one algorithm for encryption as well as authentication. This makes authenticated encryption very attractive for low-cost low-power hardware implementations, as it allows for the substantial decrease in the circuit area and power consumed compared to the traditional schemes.
In this thesis, an authenticated encryption scheme is proposed with the focus of achieving high throughput and low overhead for SDRs. The thesis is divided into two research topics. One topic is the design of a 1-pass authenticated encryption scheme that can accomplish both message secrecy and authenticity in a single cryptographic primitive. The other topic is the implementation of this design on re-configurable hardware in SDRs by closely observing the trade-off between area/throughput performance parameters.
For test and performance evaluation the design has been implemented in Xilinx Spartan – 3 sxc3s700an FPGA. The resulting implementation consumes moderate number of slices on FPGA and achieves throughput in the range of 0.8 Gbps which can be suitably used for SDR applications. Comparing with traditional two pass approaches, the presented design demonstrates high throughput and small area to performance ratio.
| Originalsprog | Engelsk |
|---|---|
| Status | Udgivet - 15 nov. 2012 |