TY - GEN
T1 - Asymmetric Cascaded Multilevel Inverter with Capacitor-based Half-bridge Cells and Reduced Number of Components
AU - Eskandari, Reyhaneh
AU - Jahan, Hossein Khoun
AU - Shotorbani, Amin Mohammadpour
AU - Abapour, Mehdi
AU - Peyghami, Saeed
AU - Blaabjerg, Frede
N1 - Publisher Copyright:
© 2020 IEEE.
Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.
PY - 2020/11
Y1 - 2020/11
N2 - This study proposes an asymmetric multilevel inverter (MI) entitled as the Asymmetric CascadedHalf-bridge MI (ACHB-MI). The proposed ACHB-MI is structured by cascading multiple capacitor-basedhalf-bridge cells with nonequal dc sources and one ancillary cell. A half-bridge cell can only develop a specific voltage level with either a negative or positive polarity, and thus the cascaded halfbridge cells can generate certain odd or even voltage levels. Consequently, an ancillary cell is added to generate the entire needed negative, positive and zero voltage levels. The proposed ACHB-MI reduces the total number of switches, the conduction power loss, and the cost. The performance and feasibility of the proposed ACHB-MI are approved through simulation and experimental verification.
AB - This study proposes an asymmetric multilevel inverter (MI) entitled as the Asymmetric CascadedHalf-bridge MI (ACHB-MI). The proposed ACHB-MI is structured by cascading multiple capacitor-basedhalf-bridge cells with nonequal dc sources and one ancillary cell. A half-bridge cell can only develop a specific voltage level with either a negative or positive polarity, and thus the cascaded halfbridge cells can generate certain odd or even voltage levels. Consequently, an ancillary cell is added to generate the entire needed negative, positive and zero voltage levels. The proposed ACHB-MI reduces the total number of switches, the conduction power loss, and the cost. The performance and feasibility of the proposed ACHB-MI are approved through simulation and experimental verification.
KW - asymmetric modules
KW - cascaded half-bridge inverter
KW - component reduction
KW - Multilevel inverter
UR - http://www.scopus.com/inward/record.url?scp=85098572993&partnerID=8YFLogxK
U2 - 10.1109/COMPEL49091.2020.9265696
DO - 10.1109/COMPEL49091.2020.9265696
M3 - Article in proceeding
AN - SCOPUS:85098572993
T3 - IEEE Workshop on Control and Modeling for Power Electronics (COMPEL)
SP - 1
EP - 6
BT - 2020 IEEE 21st Workshop on Control and Modeling for Power Electronics, COMPEL 2020
PB - IEEE Signal Processing Society
T2 - 21st IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2020
Y2 - 9 November 2020 through 12 November 2020
ER -