Automated gate impedance network design for SiC MOSFETs using SPICE solver interfaced with MATLAB environment

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Abstract

In order to ensure proper switching of SiC devices gate impedance has to be carefully selected. Chosen topology and parameter values allow for damping the oscillations in poorly designed layouts, as well as adjusting dV/dt levels in cases where layout allows for too fast switching. Due to a wide choice of gate impedance topologies, some with multiple tunable parameters, experimental fine-tuning is a time-consuming process and analytical predictions do not take full effect of the parasitic elements into account. For this reason, an automated design process is developed using Matlab and LTSpice and the results are verified experimentally in a Double Pulse Test(DPT) setup, for the prediction accuracy assessment.
OriginalsprogEngelsk
Titel2022 24th European Conference on Power Electronics and Applications (EPE'22 ECCE Europe)
Antal sider9
ForlagIEEE
Publikationsdatookt. 2022
ISBN (Elektronisk)9789075815399
StatusUdgivet - okt. 2022
Begivenhed2022 24th European Conference on Power Electronics and Applications (EPE'22 ECCE Europe) - Hanover, Germany, Hanover, Tyskland
Varighed: 5 sep. 20229 sep. 2022

Konference

Konference2022 24th European Conference on Power Electronics and Applications (EPE'22 ECCE Europe)
LokationHanover, Germany
Land/OmrådeTyskland
ByHanover
Periode05/09/202209/09/2022

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