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Abstract
Phase-looked Loop (PLL) is a critical component for the control and grid synchronization of grid-connected power converters. This paper presents a benchmarking study on the small-signal dynamics of three commonly used PLLs for single-phase converters, including enhanced PLL, second-order generalized integrator based PLL, and the inverse-PLL. First, a unified small-signal model of those PLLs is established for comparing their dynamics. Then, a systematic design guideline for parameters tuning of the PLLs is formulated. To confirm the validity of theoretical analysis, nonlinear time-domain simulation results and experimental results are presented.
Originalsprog | Engelsk |
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Titel | Proceedings of the 2015 9th International Conference on Power Electronics and ECCE Asia (ICPE-ECCE Asia) |
Antal sider | 8 |
Forlag | IEEE Press |
Publikationsdato | jun. 2015 |
Sider | 1420 - 1427 |
DOI | |
Status | Udgivet - jun. 2015 |
Begivenhed | 9th International Conference on Power Electronics and ECCE Asia (ICPE-ECCE Asia 2015) - Seoul, Sydkorea Varighed: 1 jun. 2015 → 5 jun. 2015 |
Konference
Konference | 9th International Conference on Power Electronics and ECCE Asia (ICPE-ECCE Asia 2015) |
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Land/Område | Sydkorea |
By | Seoul |
Periode | 01/06/2015 → 05/06/2015 |
Fingeraftryk
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Blaabjerg, F., Bak, C. L., Wang, X., Beres, R. N., Kwon, J., Gui, Y., Yoon, C. & Ebrahimzadeh, E.
01/02/2013 → 28/02/2018
Projekter: Projekt › Forskning