Common mode current mitigation for medium voltage half bridge SiC modules

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13 Citationer (Scopus)

Abstrakt

Medium voltage 10 kV Silicon Carbide MOSFETs, introduce challenges regarding converter design. Very high rate of voltage change and capacitive couplings to for example cooling systems cause increased electromagnetic interference. The aim of this paper is to accurately model the capacitive coupling to a heat sink and experimentally validate the model. An analytic model of the heat sink is developed which is demonstrated to be in excellent agreement with experimental results. The experimental result validates the modelled heat sink network allowing engineers to choose a suitable grounding impedance to comply with the electromagnetic compatibility regulations.
OriginalsprogEngelsk
TitelProceedings of 2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe)
Antal sider8
ForlagIEEE Press
Publikationsdatosep. 2017
ISBN (Elektronisk)978-90-75815-27-6
DOI
StatusUdgivet - sep. 2017
Begivenhed2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe) - Warsaw, Polen
Varighed: 11 sep. 201714 sep. 2017

Konference

Konference2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe)
LandPolen
ByWarsaw
Periode11/09/201714/09/2017

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  • Citationsformater

    Christensen, N., Jørgensen, A. B., Dalal, D. N., Sønderskov, S. D., Beczkowski, S., Uhrenfeldt, C., & Munk-Nielsen, S. (2017). Common mode current mitigation for medium voltage half bridge SiC modules. I Proceedings of 2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe) IEEE Press. https://doi.org/10.23919/EPE17ECCEEurope.2017.8099202