Control strategies of mitigating dead-time effect on power converters: An overview

Yi Ji, Yong Yang, Jiale Zhou, Hao Ding, Xiaoqiang Guo*, Sanjeevikumar Padmanaban

*Kontaktforfatter

Publikation: Bidrag til tidsskriftReview (oversigtsartikel)Forskningpeer review

6 Citationer (Scopus)

Resumé

To prevent short-circuits between the upper and lower switches of power converters from over-current protection, the dead time is mandatory in the switching gating signal for voltage source converters. However, this results in many negative effects on system operations, such as output voltage and current distortions (e.g., increased level of fifth and seventh harmonics), zero-current-clamping phenomenon, and output fundamental-frequency voltage reduction. Many solutions have been presented to cope with this problem. First, the dead-time effect is analyzed by taking into account factors such as the zero-clamping phenomenon, voltage drops on diodes and transistors, and the parameters of inverter loads, as well as the parasitic nature of semiconductor switches. Second, the state-of-the-art dead-time compensation algorithms are presented in this paper. Third, the advantages and disadvantages of existing algorithms are discussed, together with the future trends of dead-time compensation algorithms. This article provides a complete scenario of dead-time compensation with control strategies for voltage source converters for researchers to identify suitable solutions based on demand and application.
OriginalsprogEngelsk
Artikelnummer196
TidsskriftElectronics (Switzerland)
Vol/bind8
Udgave nummer2
Antal sider26
ISSN2079-9292
DOI
StatusUdgivet - feb. 2019

Fingerprint

Power converters
Electric potential
Semiconductor switches
Short circuit currents
Transistors
Diodes
Switches
Compensation and Redress

Citer dette

Ji, Yi ; Yang, Yong ; Zhou, Jiale ; Ding, Hao ; Guo, Xiaoqiang ; Padmanaban, Sanjeevikumar. / Control strategies of mitigating dead-time effect on power converters: An overview. I: Electronics (Switzerland). 2019 ; Bind 8, Nr. 2.
@article{0c11f05af87a4c4ab4e2c1369309506c,
title = "Control strategies of mitigating dead-time effect on power converters: An overview",
abstract = "To prevent short-circuits between the upper and lower switches of power converters from over-current protection, the dead time is mandatory in the switching gating signal for voltage source converters. However, this results in many negative effects on system operations, such as output voltage and current distortions (e.g., increased level of fifth and seventh harmonics), zero-current-clamping phenomenon, and output fundamental-frequency voltage reduction. Many solutions have been presented to cope with this problem. First, the dead-time effect is analyzed by taking into account factors such as the zero-clamping phenomenon, voltage drops on diodes and transistors, and the parameters of inverter loads, as well as the parasitic nature of semiconductor switches. Second, the state-of-the-art dead-time compensation algorithms are presented in this paper. Third, the advantages and disadvantages of existing algorithms are discussed, together with the future trends of dead-time compensation algorithms. This article provides a complete scenario of dead-time compensation with control strategies for voltage source converters for researchers to identify suitable solutions based on demand and application.",
keywords = "Dead-time compensation, Harmonics, Power converters",
author = "Yi Ji and Yong Yang and Jiale Zhou and Hao Ding and Xiaoqiang Guo and Sanjeevikumar Padmanaban",
year = "2019",
month = "2",
doi = "10.3390/electronics8020196",
language = "English",
volume = "8",
journal = "Electronics",
issn = "2079-9292",
publisher = "M D P I AG",
number = "2",

}

Control strategies of mitigating dead-time effect on power converters: An overview. / Ji, Yi; Yang, Yong; Zhou, Jiale; Ding, Hao; Guo, Xiaoqiang; Padmanaban, Sanjeevikumar.

I: Electronics (Switzerland), Bind 8, Nr. 2, 196, 02.2019.

Publikation: Bidrag til tidsskriftReview (oversigtsartikel)Forskningpeer review

TY - JOUR

T1 - Control strategies of mitigating dead-time effect on power converters: An overview

AU - Ji, Yi

AU - Yang, Yong

AU - Zhou, Jiale

AU - Ding, Hao

AU - Guo, Xiaoqiang

AU - Padmanaban, Sanjeevikumar

PY - 2019/2

Y1 - 2019/2

N2 - To prevent short-circuits between the upper and lower switches of power converters from over-current protection, the dead time is mandatory in the switching gating signal for voltage source converters. However, this results in many negative effects on system operations, such as output voltage and current distortions (e.g., increased level of fifth and seventh harmonics), zero-current-clamping phenomenon, and output fundamental-frequency voltage reduction. Many solutions have been presented to cope with this problem. First, the dead-time effect is analyzed by taking into account factors such as the zero-clamping phenomenon, voltage drops on diodes and transistors, and the parameters of inverter loads, as well as the parasitic nature of semiconductor switches. Second, the state-of-the-art dead-time compensation algorithms are presented in this paper. Third, the advantages and disadvantages of existing algorithms are discussed, together with the future trends of dead-time compensation algorithms. This article provides a complete scenario of dead-time compensation with control strategies for voltage source converters for researchers to identify suitable solutions based on demand and application.

AB - To prevent short-circuits between the upper and lower switches of power converters from over-current protection, the dead time is mandatory in the switching gating signal for voltage source converters. However, this results in many negative effects on system operations, such as output voltage and current distortions (e.g., increased level of fifth and seventh harmonics), zero-current-clamping phenomenon, and output fundamental-frequency voltage reduction. Many solutions have been presented to cope with this problem. First, the dead-time effect is analyzed by taking into account factors such as the zero-clamping phenomenon, voltage drops on diodes and transistors, and the parameters of inverter loads, as well as the parasitic nature of semiconductor switches. Second, the state-of-the-art dead-time compensation algorithms are presented in this paper. Third, the advantages and disadvantages of existing algorithms are discussed, together with the future trends of dead-time compensation algorithms. This article provides a complete scenario of dead-time compensation with control strategies for voltage source converters for researchers to identify suitable solutions based on demand and application.

KW - Dead-time compensation

KW - Harmonics

KW - Power converters

UR - http://www.scopus.com/inward/record.url?scp=85062674574&partnerID=8YFLogxK

U2 - 10.3390/electronics8020196

DO - 10.3390/electronics8020196

M3 - Review article

VL - 8

JO - Electronics

JF - Electronics

SN - 2079-9292

IS - 2

M1 - 196

ER -