TY - JOUR
T1 - DSCC-MMC STATCOM Main Circuit Parameters Design Considering Positive and Negative Sequence Compensation
AU - Cupertino, Allan Fagner
AU - Farias, João Victor Matos
AU - Pereira, Heverton Augusto
AU - Seleme, Seleme Isaac
AU - Teodorescu, Remus
PY - 2018/2/1
Y1 - 2018/2/1
N2 - The double-star chopper cell modular multilevel converter (DSCC-MMC) has been employed in several applications as HVDC, energy storage, renewable energy, electrical drives and STATCOMs. Generally, the DSCC-MMC main circuit parameter design presented in literature considers balanced currents flowing through the converter. Nevertheless, in STATCOM application, the converter can compensate negative sequence components and unbalanced currents flow through the DSCC-MMC, resulting in different stresses in the converter phases. Therefore, this work presents a detailed design methodology of the DSCC-MMC main circuit parameters, considering both positive and negative sequence current compensations. The dc-link voltage, number of submodules, power semiconductor thermal stresses, submodule capacitance and arm inductances are designed. Expressions for the energy storage requirements are derived when negative sequence is compensated. A case study considering a 15-MVA STATCOM is presented, and simulation results validate the proposed design methodology. Finally, the converter power losses and thermal stresses in the power semiconductors are evaluated.
AB - The double-star chopper cell modular multilevel converter (DSCC-MMC) has been employed in several applications as HVDC, energy storage, renewable energy, electrical drives and STATCOMs. Generally, the DSCC-MMC main circuit parameter design presented in literature considers balanced currents flowing through the converter. Nevertheless, in STATCOM application, the converter can compensate negative sequence components and unbalanced currents flow through the DSCC-MMC, resulting in different stresses in the converter phases. Therefore, this work presents a detailed design methodology of the DSCC-MMC main circuit parameters, considering both positive and negative sequence current compensations. The dc-link voltage, number of submodules, power semiconductor thermal stresses, submodule capacitance and arm inductances are designed. Expressions for the energy storage requirements are derived when negative sequence is compensated. A case study considering a 15-MVA STATCOM is presented, and simulation results validate the proposed design methodology. Finally, the converter power losses and thermal stresses in the power semiconductors are evaluated.
KW - Modular multilevel converter
KW - Negative sequence compensation
KW - Static synchronous compensator
UR - http://www.scopus.com/inward/record.url?scp=85040692127&partnerID=8YFLogxK
U2 - 10.1007/s40313-017-0349-4
DO - 10.1007/s40313-017-0349-4
M3 - Journal article
AN - SCOPUS:85040692127
SN - 2195-3880
VL - 29
SP - 62
EP - 74
JO - Journal of Control, Automation and Electrical Systems
JF - Journal of Control, Automation and Electrical Systems
IS - 1
ER -