TY - JOUR
T1 - Dynamics Assessment of Advanced Single-Phase PLL Structures
AU - Golestan, Saeed
AU - Monfarad, Mohammad
AU - Freijedo, Francisco D.
AU - Guerrero, Josep M.
PY - 2013
Y1 - 2013
N2 - Recently, several advanced phase locked loop (PLL) techniques have been proposed for single-phase applications. Among these, the Park-PLL, and the second order generalized integrator (SOGI) based PLL are very attractive, owing to their simple digital implementation, low computational burden, and desired performance under frequency-varying and harmonically distorted grid conditions. Despite the wide acceptance and use of these two advanced PLLs, no comprehensive design guidelines to fine-tune their parameters have been reported yet. Through a detailed mathematical analysis it is shown that these two PLL structures are equivalent to each other, from the control point of view. Then, a linearized model is developed which is valid for both PLLs. The derived model significantly simplifies the stability analysis and the parameter design. To fine-tune the PLL parameters, a systematic design approach is suggested afterwards, which guarantees a fast dynamic response, a high disturbance rejection ability, and a robust performance. Finally, the simulation and experimental results are presented to support the theoretical analysis.
AB - Recently, several advanced phase locked loop (PLL) techniques have been proposed for single-phase applications. Among these, the Park-PLL, and the second order generalized integrator (SOGI) based PLL are very attractive, owing to their simple digital implementation, low computational burden, and desired performance under frequency-varying and harmonically distorted grid conditions. Despite the wide acceptance and use of these two advanced PLLs, no comprehensive design guidelines to fine-tune their parameters have been reported yet. Through a detailed mathematical analysis it is shown that these two PLL structures are equivalent to each other, from the control point of view. Then, a linearized model is developed which is valid for both PLLs. The derived model significantly simplifies the stability analysis and the parameter design. To fine-tune the PLL parameters, a systematic design approach is suggested afterwards, which guarantees a fast dynamic response, a high disturbance rejection ability, and a robust performance. Finally, the simulation and experimental results are presented to support the theoretical analysis.
U2 - 10.1109/TIE.2012.2193863
DO - 10.1109/TIE.2012.2193863
M3 - Journal article
SN - 0278-0046
VL - 60
SP - 2167
EP - 2177
JO - I E E E Transactions on Industrial Electronics
JF - I E E E Transactions on Industrial Electronics
IS - 6
ER -