Efficient FPGA Implementation of a STBC-OFDM Combiner for an IEEE 802.16 Software Radio Receiver

Andrea Fabio Cattoni; Yannick Le Moullec; Claudio Sacchi

doi:10.1007/s11235-013-9833-8

Efficient FPGA Implementation of a STBC-OFDM Combiner for an IEEE 802.16 Software Radio Receiver

Andrea Fabio Cattoni, Yannick Le Moullec, Claudio Sacchi

Publikation: Bidrag til tidsskrift › Tidsskriftartikel › Forskning › peer review

1 Citationer (Scopus)

8 Downloads (Pure)

Abstrakt

In this paper, an efficient FPGA implementation of a 4x4 Space-Time Block Coding (STBC) combiner for MIMO-OFDM software radio receivers is considered. The proposed combiner is based on a low-complexity algorithm which reduces the interference due to the Quasi-Orthogonality of the STBC decoding. In the literature, feedback techniques have been proposed to solve this problem. However, the algorithm introduced in this paper has been conceived in order to avoid the transmission feedback, by estimating the interference factors and removing them. The proposed algorithm exhibits a low computational complexity and complies with the requirements of HW feasibility, considering the execution time/area occupation trade-off.

Originalsprog	Engelsk
Tidsskrift	Telecommunication Systems
Vol/bind	56
Udgave nummer	2
Sider (fra-til)	245-255
ISSN	1018-4864
DOI	https://doi.org/10.1007/s11235-013-9833-8
Status	Udgivet - 2014

Adgang til dokumentet

10.1007/s11235-013-9833-8

http://link.springer.com/article/10.1007%2Fs11235-013-9833-8

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1 Afsluttet

SAMURAI: Spectrum Aggregation and Multi-User MIMO: ReAl-world Impact: SAMURAI - EU ID: FP7-INFSO-ICT-248268
Sørensen, T. B., Cattoni, A. F., Nguyen, H. T., Tonelli, O., Deneire, L. & Berardinelli, G.
<ingen navn>
01/01/2010 → 30/06/2012
Projekter: Projekt › Forskning

Citationsformater

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title = "Efficient FPGA Implementation of a STBC-OFDM Combiner for an IEEE 802.16 Software Radio Receiver",

abstract = "In this paper, an efficient FPGA implementation of a 4x4 Space-Time Block Coding (STBC) combiner for MIMO-OFDM software radio receivers is considered. The proposed combiner is based on a low-complexity algorithm which reduces the interference due to the Quasi-Orthogonality of the STBC decoding. In the literature, feedback techniques have been proposed to solve this problem. However, the algorithm introduced in this paper has been conceived in order to avoid the transmission feedback, by estimating the interference factors and removing them. The proposed algorithm exhibits a low computational complexity and complies with the requirements of HW feasibility, considering the execution time/area occupation trade-off.",

keywords = "Software Defined Radio, MIMO, FPGA, OFDM, WiMAX",

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T1 - Efficient FPGA Implementation of a STBC-OFDM Combiner for an IEEE 802.16 Software Radio Receiver

AU - Cattoni, Andrea Fabio

AU - Le Moullec, Yannick

AU - Sacchi, Claudio

PY - 2014

Y1 - 2014

N2 - In this paper, an efficient FPGA implementation of a 4x4 Space-Time Block Coding (STBC) combiner for MIMO-OFDM software radio receivers is considered. The proposed combiner is based on a low-complexity algorithm which reduces the interference due to the Quasi-Orthogonality of the STBC decoding. In the literature, feedback techniques have been proposed to solve this problem. However, the algorithm introduced in this paper has been conceived in order to avoid the transmission feedback, by estimating the interference factors and removing them. The proposed algorithm exhibits a low computational complexity and complies with the requirements of HW feasibility, considering the execution time/area occupation trade-off.

AB - In this paper, an efficient FPGA implementation of a 4x4 Space-Time Block Coding (STBC) combiner for MIMO-OFDM software radio receivers is considered. The proposed combiner is based on a low-complexity algorithm which reduces the interference due to the Quasi-Orthogonality of the STBC decoding. In the literature, feedback techniques have been proposed to solve this problem. However, the algorithm introduced in this paper has been conceived in order to avoid the transmission feedback, by estimating the interference factors and removing them. The proposed algorithm exhibits a low computational complexity and complies with the requirements of HW feasibility, considering the execution time/area occupation trade-off.

KW - Software Defined Radio

KW - MIMO

KW - FPGA

KW - OFDM

KW - WiMAX

U2 - 10.1007/s11235-013-9833-8

DO - 10.1007/s11235-013-9833-8

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JO - Telecommunication Systems

JF - Telecommunication Systems

SN - 1018-4864

IS - 2

ER -

Efficient FPGA Implementation of a STBC-OFDM Combiner for an IEEE 802.16 Software Radio Receiver

Abstrakt

Adgang til dokumentet

SAMURAI: <strong>S</strong>pectrum <strong>A</strong>ggregation and <strong>M</strong>ulti-<strong>U</strong>ser MIMO: <strong>R</strong>e<strong>A</strong>l-world <strong>I</strong>mpact: <strong>SAMURAI - EU ID: FP7-INFSO-ICT-248268</strong>

Citationsformater