Energy Efficient and High–Performance FIR Filter Design on Spartan–6 FPGA

In this paper, we are going to design the energy efficient Gaussian low pass
FIR filter on spartan–6 FPGA. To make an energy efficient filter, we have used
different methods in this paper like capacitance scaling, frequency scaling, and
then we analysed the demand for power by Gaussian low pass FIR filter. The
frequency range which is used in this paper is 1 GHz, 2GHz, 2.5GHz, 5 GHz,
10 GHz and the range of capacitance which we have used in this paper is 5pF,
10pF, 25pF, 40pF and 50 pF. An FIR filter always remnants in linear phase with
the help of symmetric coefficient and this is the very useful feature of the FIR
filter for phase sensitive application like data communications etc. At present,
there are many different methods of communications and networking. So, in this
paper, we have designed an energy–efficient FIR filter and that design will faster
than traditional design.