Exploitation of Digital Filters to Advance the Single-Phase T/4 Delay PLL System

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4 Citationer (Scopus)

Abstrakt

With the development of digital signal processing technologies, control and monitoring of power electronics conversion systems have been evolving to become fully digital. As the basic element in the design and analysis phase of digital controllers or filters, a number of unit delays (z^-1) have been employed, e.g., in a cascaded structure. Practically, the number of unit delays is designed as an integer, which is related to the sampling frequency (e.g., 50 Hz). More common, the sampling frequency is fixed during operation for simplicity and design. Hence, any disturbance in the ac signal will violate this design rule and it can become a major challenge for digital controllers. To deal with the above issue, this paper first exploits a virtual unit delay (z_v^-1) to emulate the viable sampling behavior in practical digital signal processors with a fixed sampling rate. This exploitation is demonstrated on a T/4 Delay Phase Locked Loop (PLL) system for a single-phase grid-connected inverter. The T/4 Delay PLL requires to cascade 50 unit delays when implemented (for a 50-Hz system with 10 kHz sampling frequency). Furthermore, digital frequency adaptive comb filters are adopted to enhance the performance of the T/4 Delay PLL when the grid suffers from harmonics. Experimental results have confirmed the effectiveness of the digital filters for advanced control systems.
OriginalsprogEngelsk
TitelProceedings of the IEEE Southern Power Electronics Conference (SPEC), 2016
Antal sider6
ForlagIEEE Press
Publikationsdatodec. 2016
ISBN (Elektronisk)978-1-5090-1546-7
DOI
StatusUdgivet - dec. 2016
BegivenhedIEEE SPEC 2016 - Southern Power Electronic Conference - Auckland, New Zealand
Varighed: 5 dec. 20168 dec. 2016
http://www.ieee-spec.org/

Konference

KonferenceIEEE SPEC 2016 - Southern Power Electronic Conference
LandNew Zealand
ByAuckland
Periode05/12/201608/12/2016
Internetadresse

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  • Citationsformater

    Yang, Y., Zhou, K., & Blaabjerg, F. (2016). Exploitation of Digital Filters to Advance the Single-Phase T/4 Delay PLL System. I Proceedings of the IEEE Southern Power Electronics Conference (SPEC), 2016 IEEE Press. https://doi.org/10.1109/SPEC.2016.7846206