TY - JOUR
T1 - Impedance Modeling of Three-phase Grid-Connected Voltage Source Converters With Frequency-Locked-Loop-Based Synchronization Algorithms
AU - Golestan, Saeed
AU - Guerrero, Josep M.
AU - Al-Turki, Yusuf A.
AU - Vasquez, Juan
AU - Abusorrah, Abdullah M.
N1 - Publisher Copyright:
IEEE
PY - 2022/4/1
Y1 - 2022/4/1
N2 - With the increased installation of voltage source converters (VSCs) into the power grid, concerns about resonance/stability issues associated with interactions among converters, and between them and the ac grid is growing. The prevailing method for investigating these issues is the impedance modeling of VSCs, which involves linearizing all their control elements, such as their current control and grid synchronization system among others. In this process, most often a phase-locked loop (PLL) is considered for the grid synchronization of VSCs in the literature. The available options for the grid synchronization, however, are not limited to PLLs; a large number of frequency-locked loops (FLLs) for the grid synchronization of VSCs may also be found in the literature. The impedance modeling of three-phase VSCs equipped with FLL-based grid synchronization systems can be quite challenging as FLLs have different structures compared to PLLs. This article aims to address this difficulty. The general idea is obtaining the PLL counterparts of FLLs, which makes the VSC impedance modeling very straightforward. To make this idea clear, several case studies are presented and investigated.
AB - With the increased installation of voltage source converters (VSCs) into the power grid, concerns about resonance/stability issues associated with interactions among converters, and between them and the ac grid is growing. The prevailing method for investigating these issues is the impedance modeling of VSCs, which involves linearizing all their control elements, such as their current control and grid synchronization system among others. In this process, most often a phase-locked loop (PLL) is considered for the grid synchronization of VSCs in the literature. The available options for the grid synchronization, however, are not limited to PLLs; a large number of frequency-locked loops (FLLs) for the grid synchronization of VSCs may also be found in the literature. The impedance modeling of three-phase VSCs equipped with FLL-based grid synchronization systems can be quite challenging as FLLs have different structures compared to PLLs. This article aims to address this difficulty. The general idea is obtaining the PLL counterparts of FLLs, which makes the VSC impedance modeling very straightforward. To make this idea clear, several case studies are presented and investigated.
KW - Adaptive filters
KW - Computational modeling
KW - Converters
KW - Frequency locked loops
KW - frequency-locked loops (FLLs)
KW - grid synchronization
KW - Impedance
KW - impedance model
KW - linearization
KW - observers
KW - Phase locked loops
KW - phase-locked loops (PLLs)
KW - Power conversion
KW - stability
KW - Synchronization
KW - synchronous reference frame (SRF)
KW - three-phase systems
KW - voltage source converter (VSC)
UR - http://www.scopus.com/inward/record.url?scp=85118248556&partnerID=8YFLogxK
U2 - 10.1109/TPEL.2021.3121314
DO - 10.1109/TPEL.2021.3121314
M3 - Journal article
AN - SCOPUS:85118248556
SN - 0885-8993
VL - 37
SP - 4511
EP - 4525
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 4
ER -