Impedance-Oriented Transient Instability Modeling of SiC MOSFET Intruded by Measurement Probes

Due to the breakneck switching speed, SiC MOSFET is extremely sensitive to parasitics in the power device, circuit layout, and also measurement probe. It is not clear how the parasitics of measurement probes affect the transient stability of SiC MOSFET, and it poses an unsolved challenge for the industrial field. This paper is targeting to uncover the transient instability mechanism of SiC MOSFET intruded by probes. Mathematical and circuit models of voltage and current probes are created, by considering the parasitics, input impedance, and bandwidth issues. To reveal the stability principles of SiC MOSFET associated with probes, impedance-oriented and heterogeneity-synthesized models combining device with probes are proposed. Furthermore, an assessment methodology and root locus analysis are presented to demonstrate the transient stability schemes and the stable boundaries of SiC MOSFET influenced by multiple factors, including probe parasitics, device parameters, gate resistances, and snubber circuits. Comparative experiments are presented to confirm the transient behaviors of SiC MOSFET intruded by probe parasitics and regulated by control circuits. It is proven that, because of low bandwidth specifications, the large input capacitance of the voltage probe and coil inductance of the current probe degrade the transient stability of SiC MOSFET. Due to the deteriorated stability margin of SiC MOSFET intruded by the inserted parasitics of probes, instability may also be activated by using the small gate resistance. The snubber circuit is helpful to enhance the transient stability. Advanced probes with high bandwidth and high impedance are crucially needed for stable measurement of wide bandgap power devices like SiC MOSFET.