Junction Temperature Aware Energy Efficient Router Design on FPGA

Energy, Power and efficiency are very much related to each other. To make any system efficient, Power consumed by it must be minimized or we can say that power dissipation should be less. In our research we tried to make a energy efficient router design on FPGA by varying junction temperature. By varying junction temperature the value of leakage is observed and its effect on total power dissipated is also obtained. This research is made by keeping output load at value 50.The result is also obtained at different frequencies i.e. at 10MHz, 0.1GHz and 1GHz. Different values of output power at observed and reduction the power is calculated accordingly. So this project gives an overview to make the router efficient by varying junction temperature.