Loss and thermal model for power semiconductors including device rating information

Publikation: Bidrag til bog/antologi/rapport/konference proceedingKonferenceartikel i proceedingForskningpeer review

6 Citationer (Scopus)

Resumé

The electrical loading and device rating are both important factors that determine the loss and thermal behaviors of power semiconductor devices. In the existing loss and thermal models, only the electrical loadings are focused and treated as design variables, while the device rating is normally pre-defined by experience with poor design flexibility. Consequently a more complete loss and thermal model is proposed in this paper, which takes into account not only the electrical loading but also the device rating as input variables. The quantified correlation between the power loss, thermal impedance and silicon area of Insulated Gate Bipolar Transistor (IGBT) is mathematically established. By this new modeling approach, all factors that have impacts to the loss and thermal profiles of power devices can be accurately mapped, enabling more design freedom to optimize the efficiency and thermal loading of power converter. The proposed model can be further improved by experimental tests, and it is well agreed by both circuit and Finite Element Method (FEM) simulation results.
OriginalsprogEngelsk
TitelProceedings of the 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA)
Antal sider8
ForlagIEEE Press
Publikationsdatomaj 2014
Sider2862-2869
ISBN (Trykt)9781479927067
ISBN (Elektronisk)9781479927043
DOI
StatusUdgivet - maj 2014
Begivenhed2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA) - Hiroshima, Japan
Varighed: 18 maj 201421 maj 2014

Konference

Konference2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA)
LandJapan
ByHiroshima
Periode18/05/201421/05/2014

Fingerprint

Insulated gate bipolar transistors (IGBT)
Power converters
Hot Temperature
Power semiconductor devices
Finite element method
Silicon
Networks (circuits)

Citer dette

Ma, K., Bahman, A. S., Beczkowski, S., & Blaabjerg, F. (2014). Loss and thermal model for power semiconductors including device rating information. I Proceedings of the 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA) (s. 2862-2869). IEEE Press. https://doi.org/10.1109/IPEC.2014.6870087
Ma, Ke ; Bahman, Amir Sajjad ; Beczkowski, Szymon ; Blaabjerg, Frede. / Loss and thermal model for power semiconductors including device rating information. Proceedings of the 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA). IEEE Press, 2014. s. 2862-2869
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title = "Loss and thermal model for power semiconductors including device rating information",
abstract = "The electrical loading and device rating are both important factors that determine the loss and thermal behaviors of power semiconductor devices. In the existing loss and thermal models, only the electrical loadings are focused and treated as design variables, while the device rating is normally pre-defined by experience with poor design flexibility. Consequently a more complete loss and thermal model is proposed in this paper, which takes into account not only the electrical loading but also the device rating as input variables. The quantified correlation between the power loss, thermal impedance and silicon area of Insulated Gate Bipolar Transistor (IGBT) is mathematically established. By this new modeling approach, all factors that have impacts to the loss and thermal profiles of power devices can be accurately mapped, enabling more design freedom to optimize the efficiency and thermal loading of power converter. The proposed model can be further improved by experimental tests, and it is well agreed by both circuit and Finite Element Method (FEM) simulation results.",
author = "Ke Ma and Bahman, {Amir Sajjad} and Szymon Beczkowski and Frede Blaabjerg",
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Ma, K, Bahman, AS, Beczkowski, S & Blaabjerg, F 2014, Loss and thermal model for power semiconductors including device rating information. i Proceedings of the 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA). IEEE Press, s. 2862-2869, Hiroshima, Japan, 18/05/2014. https://doi.org/10.1109/IPEC.2014.6870087

Loss and thermal model for power semiconductors including device rating information. / Ma, Ke; Bahman, Amir Sajjad; Beczkowski, Szymon; Blaabjerg, Frede.

Proceedings of the 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA). IEEE Press, 2014. s. 2862-2869.

Publikation: Bidrag til bog/antologi/rapport/konference proceedingKonferenceartikel i proceedingForskningpeer review

TY - GEN

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AB - The electrical loading and device rating are both important factors that determine the loss and thermal behaviors of power semiconductor devices. In the existing loss and thermal models, only the electrical loadings are focused and treated as design variables, while the device rating is normally pre-defined by experience with poor design flexibility. Consequently a more complete loss and thermal model is proposed in this paper, which takes into account not only the electrical loading but also the device rating as input variables. The quantified correlation between the power loss, thermal impedance and silicon area of Insulated Gate Bipolar Transistor (IGBT) is mathematically established. By this new modeling approach, all factors that have impacts to the loss and thermal profiles of power devices can be accurately mapped, enabling more design freedom to optimize the efficiency and thermal loading of power converter. The proposed model can be further improved by experimental tests, and it is well agreed by both circuit and Finite Element Method (FEM) simulation results.

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Ma K, Bahman AS, Beczkowski S, Blaabjerg F. Loss and thermal model for power semiconductors including device rating information. I Proceedings of the 2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA). IEEE Press. 2014. s. 2862-2869 https://doi.org/10.1109/IPEC.2014.6870087