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Abstract
This paper presents a compact model for P+ guard rings in lightly doped CMOS substrates featuring a P-well layer. Simple expressions for the impedances in the model are derived based on a conformal mapping approach. The model can be used to predict the noise suppression performance of P+ guard rings in terms of S-parameters, which is useful for substrate noise mitigation in mixed-signal system-on-chips. Validation of the model has been done by both electromagnetic simulation and experimental results from guard rings implemented using a standard 0.18- μm CMOS process. In addition, design guidelines have been drawn for minimizing the guard ring size while maintaining the noise suppression performance
Originalsprog | Engelsk |
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Tidsskrift | I E E E Transactions on Electron Devices |
Vol/bind | 60 |
Udgave nummer | 9 |
Sider (fra-til) | 2854-2861 |
Antal sider | 8 |
ISSN | 0018-9383 |
DOI | |
Status | Udgivet - aug. 2013 |
Fingeraftryk
Dyk ned i forskningsemnerne om 'Modeling and Design Guidelines for P⁺ Guard Rings in Lightly Doped CMOS Substrates'. Sammen danner de et unikt fingeraftryk.Projekter
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Microwatt Radio for Self-Sustaining Wireless Sensor Networks
Shen, M. (Projektdeltager) & Mikkelsen, J. H. (Projektdeltager)
The Danish Council for Independent Research, Technology and Production Sciences. Individual Post-doc
01/01/2011 → 30/04/2014
Projekter: Projekt › Forskning