Modeling and Design of a 1.2 pF Common-Mode Capacitance Transformer for Powering MV SiC MOSFETs Gate Drivers

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Abstrakt

This paper proposes a physics-level modeling method for analyzing the primary to secondary-side (common-mode) parasitic capacitance of the transformer for the Medium-voltage SiC MOSFETs gate drivers. The lumped circuit-based physics-model of the turn-to-turn capacitance, turn-to-core capacitance, and self capacitance of the core are derived, and it is found that the turn-to-core capacitance mainly contributes to the total equivalent parasitic common-mode capacitance. The measured common-mode impedance of the transformer shows high agreements with the calculated value, where the accuracy of the proposed modeling method can be proved based on the experimental results.
OriginalsprogEngelsk
TitelProceedings of IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society
Antal sider7
Udgivelses stedLisbon, Portugal
ForlagIEEE Press
Publikationsdatookt. 2019
DOI
StatusUdgivet - okt. 2019
BegivenhedIECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society - Lisbon, Portugal
Varighed: 14 okt. 201917 okt. 2019

Konference

KonferenceIECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society
LandPortugal
ByLisbon
Periode14/10/201917/10/2019
NavnProceedings of the Annual Conference of the IEEE Industrial Electronics Society
ISSN1553-572X

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Citationsformater

Zhao, H., Dalal, D. N., Wang, X., Jørgensen, J. K., Uhrenfeldt, C., Beczkowski, S. M., & Munk-Nielsen, S. (2019). Modeling and Design of a 1.2 pF Common-Mode Capacitance Transformer for Powering MV SiC MOSFETs Gate Drivers. I Proceedings of IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society IEEE Press. Proceedings of the Annual Conference of the IEEE Industrial Electronics Society https://doi.org/10.1109/IECON.2019.8926673