This paper proposes a physics-level modeling method for analyzing the primary to secondary-side (common-mode) parasitic capacitance of the transformer for the Medium-voltage SiC MOSFETs gate drivers. The lumped circuit-based physics-model of the turn-to-turn capacitance, turn-to-core capacitance, and self capacitance of the core are derived, and it is found that the turn-to-core capacitance mainly contributes to the total equivalent parasitic common-mode capacitance. The measured common-mode impedance of the transformer shows high agreements with the calculated value, where the accuracy of the proposed modeling method can be proved based on the experimental results.
|Konference||IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society|
|Periode||14/10/2019 → 17/10/2019|
|Navn||Proceedings of the Annual Conference of the IEEE Industrial Electronics Society|