Multi-chip medium voltage SiC MOSFET power module with focus on low parasitic capacitance

Jannick Kjær Jørgensen, Dipen Narendra Dalal, Szymon Beczkowski, Stig Munk-Nielsen, Christian Uhrenfeldt

Publikation: Bidrag til bog/antologi/rapport/konference proceedingKonferenceartikel i proceedingForskningpeer review

16 Citationer (Scopus)

Abstract

Advances in high breakdown voltage SiC MOSFETs is enabling the use of simpler topologies, such as a half-bridge in medium voltage applications. In order to increase the power output it is necessary to parallel multiple MOSFETs, which can be done in power modules. At high voltage operating conditions parasitic capacitances of the power module become increasingly important to consider, due to increased switching losses and increased risk to cause EMI. A 10 kV, 80 A half-bridge design is presented using four MOSFETs in parallel, with a design focus on minimal parasitic capacitances.

OriginalsprogEngelsk
TitelCIPS 2020 - 11th International Conference on Integrated Power Electronics Systems
Antal sider6
ForlagVDE Verlag GMBH
Publikationsdato2020
Sider154-159
ISBN (Elektronisk)9783800752263
StatusUdgivet - 2020
Begivenhed11th International Conference on Integrated Power Electronics Systems, CIPS 2020 - Berlin, Tyskland
Varighed: 24 mar. 202026 mar. 2020

Konference

Konference11th International Conference on Integrated Power Electronics Systems, CIPS 2020
Land/OmrådeTyskland
ByBerlin
Periode24/03/202026/03/2020

Bibliografisk note

Publisher Copyright:
© VDE VERLAG GMBH · Berlin · Offenbach.

Fingeraftryk

Dyk ned i forskningsemnerne om 'Multi-chip medium voltage SiC MOSFET power module with focus on low parasitic capacitance'. Sammen danner de et unikt fingeraftryk.

Citationsformater