On the Equilibrium Points in Three-Phase PLL Based on the D-Axis Voltage Normalization

Chao Wu, Xiaoling Xiong, Mads Graungaard Taul, Frede Blaabjerg

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11 Citationer (Scopus)
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Abstract

Voltage normalization is usually adopted for a phase-locked loop (PLL) to keep a constant bandwidth unaffected from the voltage magnitude at the point of synchronization. Two conventional PLL normalization methods are analyzed from a large-signal perspective in this letter. However, different from the voltage magnitude normalization method, an unexpected stable equilibrium point emerges in the three-phase PLL based on the d-axis voltage normalization, the mechanism of which is revealed by the phase-plane analysis. Due to the unexpected equilibrium point, the d-axis voltage normalization will lose the phase tracking ability when the initial phase difference or phase jump exceeds π/2. Thus, it is suggested to use the magnitude normalization instead of the d-axis voltage normalization to avoid this kind of malfunction. Finally, the experimental results validate the theoretical analysis.
OriginalsprogEngelsk
Artikelnummer9411697
TidsskriftIEEE Transactions on Power Electronics
Vol/bind36
Udgave nummer11
Sider (fra-til)12146-12150
Antal sider5
ISSN0885-8993
DOI
StatusUdgivet - nov. 2021

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