Linearization is a systematic method for reducing an amplifier's distortion. By distortion reduction, the linearizer allows the amplifier to produce more output power and thereby to operate at a higher level of efficiency for a given level of distortion. There exist a number of different Power Amplifier (PA) linearization techniques. These range from adding just a few extra components to the conventional amplifier design to complete and very complex transmitter designs. This dissertation deals with PA linearization techniques suitable for 3rd generation cellular handsets. In particular, focus is put on the study, design, and implementation of a 5th order polynomial workfunction predistorter. To facilitate a realistic predistorter system study, an accurate PA behavioral model is developed from pulsed large signal S-parameters measurements of a real 3G-PP W-CDMA device. At the nominal 0dBm drive level and within a load VSWR of 5:1, measured and simulated adjacent channel power ratios deviates less than 2dB. Based on the model and a system simulator implementation of the linearizer, three system level studies are performed. A study of the polynomial workfunction composition reveals that the inclusion of even order workfunction terms improves predistorter linearity performance but at the expense of more stringent workfunction bandwidth requirements, increased sensitivity of the workfunction coefficients, and a slightly degraded adaptation speed. A study of the predistorter noise degradation provides a simplified and compact noise analysis, which enables the RF designer to make a qualitatively trade-off between linearity performance and noise degradation. A study of the predistorter adaptation to varying antenna loads results in a novel parameterized workfunction, which can improve adaptation speed significantly when the isolator traditionally found between power amplifier and antenna is eliminated. Addressing design and implementation, a 5th order polynomial workfunction gain predistorter is presented in a standard 0.25μm CMOS technology. The linearizer is build from three main system blocks: An RF variable gain amplifier, an envelope detector, and a polynomial workfunction. In a 3G-PP W-CDMA application with a real PA device, the linearizer is able to improve PA adjacent channel power ratio by 9.3dB and 1st alternate channel power ratio by 5.3dB. This immediate reduction in spectral regrowth allows the PA to be driven at a 1.7dB higher input power level while still fulfilling the given transmit spectrum mask.