State of the Art of Fault Current Limiter and Application to the HVDC Systems

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Abstract

The rapid current rise experienced in DC short-circuit is particularly challenging in meshed multi-terminal high voltage direct current (MTDC) systems. Therefore, fault current limiters (FCLs) are crucial for the meshed MTDC. The topology and design of FCLs serve as effective solutions to mitigate fault currents and enhance the stability of DC systems. This paper introduces a new FCL topology for the MTDC systems, based on a mutual series FCL (MSFCL), which can eliminate the fault current suppression time (FCST) and restrict the fault current by using a trap loop. Moreover, the proposed FCL enhances the voltage transient during the temporary faults. The performance of the proposed FCL is compared with the conventional Inductive FCL (IFCL). A case study is conducted using PSCAD/EMTDC software, and the effectiveness of the proposed method is validated through simulation results. The results confirm that the proposed FCL offers an efficient approach to addressing short-circuit challenges in DC systems.
OriginalsprogEngelsk
Titel2024 IEEE 65th International Scientific Conference on Power and Electrical Engineering of Riga Technical University (RTUCON)
Antal sider6
Sider1-6
StatusAccepteret/In press - 2024

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