Temperature-dependency analysis and correction methods of in-situ power-loss estimation for crystalline silicon modules undergoing potential-induced degradation stress testing

Sergiu Spataru, Peter Hacke, Dezso Sera, Corinne Packard, Tamas Kerekes, Remus Teodorescu

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21 Citationer (Scopus)

Resumé

We propose a method of in-situ characterization of the photovoltaic module power at standard test conditions using superposition of the dark current-voltage (I-V) curve measured at elevated stress temperature during potential-induced degradation (PID) testing. PID chamber studies were performed on several crystalline silicon module designs to determine the extent to which the temperature dependency of maximum power is affected by the degradation of the modules. The results using the superposition principle show a mismatch between the power degradation measured at stress temperature and the power degradation measured at 25ºC, which depends on module design, stress temperature, and level of degradation. We apply a correction to this mismatch using two maximum-power temperature translation methods found in the literature. For the first method, which is based on the maximum-power temperature coefficient, we find that the temperature coefficient changes as the module degrades by PID, thus limiting its applicability. The second method we investigate is founded on the double-diode model, which allows for fundamental analysis of the degradation, but does not lend itself to large-scale data collection and analysis because of the difficulty of curve fitting. Lastly, we propose and validate experimentally a simpler and more accurate method for compensating the mismatch/estimation error, by taking advantage of the pseudo-linear relationship between the mismatch and power degradation. This leads to reduced test duration and cost, avoids stress transients while ramping to and from the stress temperature, eliminates flash testing except at the initial and final data points, and enables significantly faster and more detailed acquisition of statistical data for future application of various statistical reliability models.
OriginalsprogEngelsk
TidsskriftProgress in Photovoltaics
Vol/bind23
Udgave nummer11
Sider (fra-til)1536-1549
Antal sider14
ISSN1062-7995
DOI
StatusUdgivet - nov. 2015

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power loss
Silicon
modules
degradation
Crystalline materials
Degradation
Testing
silicon
Temperature
temperature
Dark currents
curve fitting
Curve fitting
coefficients
dark current
Error analysis
flash
acquisition
Diodes
chambers

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    @article{34a9cee3cdd048caa3c76d489bd2dbcf,
    title = "Temperature-dependency analysis and correction methods of in-situ power-loss estimation for crystalline silicon modules undergoing potential-induced degradation stress testing",
    abstract = "We propose a method of in-situ characterization of the photovoltaic module power at standard test conditions using superposition of the dark current-voltage (I-V) curve measured at elevated stress temperature during potential-induced degradation (PID) testing. PID chamber studies were performed on several crystalline silicon module designs to determine the extent to which the temperature dependency of maximum power is affected by the degradation of the modules. The results using the superposition principle show a mismatch between the power degradation measured at stress temperature and the power degradation measured at 25ºC, which depends on module design, stress temperature, and level of degradation. We apply a correction to this mismatch using two maximum-power temperature translation methods found in the literature. For the first method, which is based on the maximum-power temperature coefficient, we find that the temperature coefficient changes as the module degrades by PID, thus limiting its applicability. The second method we investigate is founded on the double-diode model, which allows for fundamental analysis of the degradation, but does not lend itself to large-scale data collection and analysis because of the difficulty of curve fitting. Lastly, we propose and validate experimentally a simpler and more accurate method for compensating the mismatch/estimation error, by taking advantage of the pseudo-linear relationship between the mismatch and power degradation. This leads to reduced test duration and cost, avoids stress transients while ramping to and from the stress temperature, eliminates flash testing except at the initial and final data points, and enables significantly faster and more detailed acquisition of statistical data for future application of various statistical reliability models.",
    keywords = "Potential-induced degradation, Crystalline silicon, Degradation, Current-voltage charactersitic, Accelerated stress testing, Temperature dependency",
    author = "Sergiu Spataru and Peter Hacke and Dezso Sera and Corinne Packard and Tamas Kerekes and Remus Teodorescu",
    year = "2015",
    month = "11",
    doi = "10.1002/pip.2587",
    language = "English",
    volume = "23",
    pages = "1536--1549",
    journal = "Progress in Photovoltaics",
    issn = "1062-7995",
    publisher = "Wiley",
    number = "11",

    }

    TY - JOUR

    T1 - Temperature-dependency analysis and correction methods of in-situ power-loss estimation for crystalline silicon modules undergoing potential-induced degradation stress testing

    AU - Spataru, Sergiu

    AU - Hacke, Peter

    AU - Sera, Dezso

    AU - Packard, Corinne

    AU - Kerekes, Tamas

    AU - Teodorescu, Remus

    PY - 2015/11

    Y1 - 2015/11

    N2 - We propose a method of in-situ characterization of the photovoltaic module power at standard test conditions using superposition of the dark current-voltage (I-V) curve measured at elevated stress temperature during potential-induced degradation (PID) testing. PID chamber studies were performed on several crystalline silicon module designs to determine the extent to which the temperature dependency of maximum power is affected by the degradation of the modules. The results using the superposition principle show a mismatch between the power degradation measured at stress temperature and the power degradation measured at 25ºC, which depends on module design, stress temperature, and level of degradation. We apply a correction to this mismatch using two maximum-power temperature translation methods found in the literature. For the first method, which is based on the maximum-power temperature coefficient, we find that the temperature coefficient changes as the module degrades by PID, thus limiting its applicability. The second method we investigate is founded on the double-diode model, which allows for fundamental analysis of the degradation, but does not lend itself to large-scale data collection and analysis because of the difficulty of curve fitting. Lastly, we propose and validate experimentally a simpler and more accurate method for compensating the mismatch/estimation error, by taking advantage of the pseudo-linear relationship between the mismatch and power degradation. This leads to reduced test duration and cost, avoids stress transients while ramping to and from the stress temperature, eliminates flash testing except at the initial and final data points, and enables significantly faster and more detailed acquisition of statistical data for future application of various statistical reliability models.

    AB - We propose a method of in-situ characterization of the photovoltaic module power at standard test conditions using superposition of the dark current-voltage (I-V) curve measured at elevated stress temperature during potential-induced degradation (PID) testing. PID chamber studies were performed on several crystalline silicon module designs to determine the extent to which the temperature dependency of maximum power is affected by the degradation of the modules. The results using the superposition principle show a mismatch between the power degradation measured at stress temperature and the power degradation measured at 25ºC, which depends on module design, stress temperature, and level of degradation. We apply a correction to this mismatch using two maximum-power temperature translation methods found in the literature. For the first method, which is based on the maximum-power temperature coefficient, we find that the temperature coefficient changes as the module degrades by PID, thus limiting its applicability. The second method we investigate is founded on the double-diode model, which allows for fundamental analysis of the degradation, but does not lend itself to large-scale data collection and analysis because of the difficulty of curve fitting. Lastly, we propose and validate experimentally a simpler and more accurate method for compensating the mismatch/estimation error, by taking advantage of the pseudo-linear relationship between the mismatch and power degradation. This leads to reduced test duration and cost, avoids stress transients while ramping to and from the stress temperature, eliminates flash testing except at the initial and final data points, and enables significantly faster and more detailed acquisition of statistical data for future application of various statistical reliability models.

    KW - Potential-induced degradation

    KW - Crystalline silicon

    KW - Degradation

    KW - Current-voltage charactersitic

    KW - Accelerated stress testing

    KW - Temperature dependency

    U2 - 10.1002/pip.2587

    DO - 10.1002/pip.2587

    M3 - Journal article

    VL - 23

    SP - 1536

    EP - 1549

    JO - Progress in Photovoltaics

    JF - Progress in Photovoltaics

    SN - 1062-7995

    IS - 11

    ER -