Methods for accelerated design for FPGA technology

In order to achieve more advanced and faster services in embedded systems, increasingly sophisticated algorithms are used. To keep abreast with the increased need for processing power, heterogeneous multiprocessor platforms are introduced. A heterogeneous platform leaves the design engineer with the problem of deciding where to map the system functionalities to get the best utilisation of the platform. Today this is done ad hoc based on the designers experiences, which leades to a longer development, which do not comply to the industry’s need for lowering the time-to-market time.
In this project we want to assist the designer in finding the optimal partitioning of the system functionality in an early stage of the design trajectory with help from measures on an executable specification. We propose some extensions to existing metrics which can clarify the functionalities affinity to different architectures. A tool will be constructed so the executable specification automatically can be analysed. Furthermore gathered information be incorporated in a scheduling technique, so a partitioning of the system functionality can be proposed – fast and easy.