Cache Performance in DSP Processors

  • Olsen, Ole, (Project Participant)

    Project Details


    EMBSYS Performance evaluation of cache memory architectures in modern superscalar and VLIW DSP processors. The project looks into various HLL constructs and their compilation onto state-of-the-art DSP processors, primarily from a cache perspective. Egidijus Kazanavicius, Ole Olsen
    Effective start/end date31/12/200131/12/2001