A DSOGI-FLL-Based Dead-Time Elimination PWM for Three-Phase Power Converters

Qingzeng Yan, Rende Zhao*, Xibo Yuan, Wenzhong Ma, Jinkui He

*Corresponding author for this work

Research output: Contribution to journalJournal articleResearchpeer-review

29 Citations (Scopus)


The dead-time elimination pulsewidth modulation (PWM) enables the drive pulses of the upper and the lower switching devices to alternate according to the current polarity, thus abandoning the dead time and essentially avoiding the dead-time effect in power converters. However, the current zero crossing will be distorted by the current jump generated by the drive-pulse alternation, and the current zero-crossing distortion will be further intensified if errors exist in the detected current polarity. Thanks to the noise-attenuation and frequency-adaptability characteristics of the double second-order generalized integrator frequency-locked loop (DSOGI-FLL), it can obtain accurate current polarities even in harmonic and unbalanced conditions. A DSOGI-FLL-based dead-time elimination PWM is, therefore, proposed in this paper, and several improvements are made to minimize the current zero-crossing distortion. An underlap period is added when alternating the upper and lower drive pulses to smooth the current jump at zero crossing, and a delay compensation term is inserted in the DSOGI-FLL to compensate both the current measurement delay and the control delay. The effectiveness of the proposed DSOGI-FLL-based dead-time elimination PWM has been validated by experiments, respectively, in the unbalanced-current, power-change, and frequency-variation conditions with an RL load, as well as in a grid-connected converter.
Original languageEnglish
Article number8362735
JournalIEEE Transactions on Power Electronics
Issue number3
Pages (from-to)2805-2818
Number of pages14
Publication statusPublished - Mar 2019
Externally publishedYes


  • Dead-time elimination pulsewidth modulation (PWM)
  • Delay compensation
  • Double second-order generalized integrator frequency-locked loop (DSOGI-FLL)
  • Power converters
  • Zero-crossing distortion


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