A Fixed-Length Transfer Delay Based Adaptive Frequency-Locked Loop for Single-Phase Systems

Z. Dai, Z. Zhang, Yongheng Yang, Frede Blaabjerg, Y. Huangfu, J. Zhang

Research output: Contribution to journalJournal articleResearchpeer-review

15 Citations (Scopus)
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This letter presents an adaptive frequency-locked loop (FLL) with fixed-length transfer delay units for single-phase systems. By analyzing the relationship between the grid voltage and its transfer delay signals, a linear regression model of the grid voltage is established. Accordingly, a transfer delay based adaptive FLL (TD-AFLL) is proposed. A mathematic proof indicates that the proposed TD-AFLL can reject both phase offset errors and double-frequency oscillatory errors. Thus, the grid voltage parameters can be estimated accurately, even when the frequency drifts away from its nominal value. Moreover, fast dynamics of the TD-AFLL are achieved due to the transfer delay structure. Experiments verify the effectiveness of the proposed method.

Original languageEnglish
Article number8468126
JournalIEEE Transactions on Power Electronics
Issue number5
Pages (from-to)4000-4004
Number of pages5
Publication statusPublished - May 2019


  • Delays
  • Estimation error
  • Frequency estimation
  • Frequency locked loop (FLL)
  • Frequency locked loops
  • Harmonic analysis
  • Phase locked loops
  • Steady-state
  • Fixed-length transfer delay
  • Frequency variations
  • Grid synchronization
  • Single-phase systems


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