A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology

Sabavat Satheesh Kumar, Kumaravel Sundaram, Sanjeevikumar Padmanaban*, Jens Bo Holm-Nielsen, Frede Blaabjerg

*Corresponding author for this work

Research output: Contribution to journalJournal articleResearchpeer-review

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