A Lumped Thermal Model Including Thermal Coupling Effects and Boundary Conditions for Capacitor Banks

Haoran Wang, Qiusheng Wang, Huai Wang

Research output: Contribution to book/anthology/report/conference proceedingArticle in proceedingResearchpeer-review

Abstract

Capacitors are widely used in power electronic converters to buffer the pulsation power, filter the harmonics and support voltage for stable operation. For these applications where single capacitor can not fulfill the voltage rating or capacitance requirements, capacitor bank is always used as the energy buffer by connecting several capacitors in parallel for larger capacitance, or in series for higher voltage capability. The existing design considerations for the capacitor bank are in terms of voltage ripple, electromagnetic-interference, power loss, weight and volume. With more stringent constrains on volume for high power density applications, reliability as well as temperature of capacitor banks should be considered into the design phase. In order to estimate the temperature of capacitor bank with sufficient accuracy and computational efficiency, this paper proposes a lumped thermal model for a capacitor bank by taking into account the boundary conditions (e.g., ambient temperature, power loss for each cell) and the thermal coupling effect among the capacitor cells. Considering the variable boundary with different loading conditions in FEM simulation, fast thermal resistance extraction method is investigated to obtain the self-heating and coupling thermal impedance. Critical uneven temperature distribution among capacitors in a bank may be observed. A case study of an electrolytic capacitor bank is presented to verify the accuracy of the proposed method.
Original languageEnglish
Title of host publicationProceedings of the 2018 International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018
Number of pages5
PublisherIEEE
Publication dateMay 2018
Pages2421-2425
Article number8507401
ISBN (Print)978-1-5386-4190-3
ISBN (Electronic)978-4-88686-405-5
DOIs
Publication statusPublished - May 2018
Event8th International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018 - Niigata, Japan
Duration: 20 May 201824 May 2018

Conference

Conference8th International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018
CountryJapan
CityNiigata
Period20/05/201824/05/2018
SponsorIEEE Industry Applications Society (IAS), IEEE Power Electronics Society (PELS), IEEJ Industry Applications Society (IAS)

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Wang, H., Wang, Q., & Wang, H. (2018). A Lumped Thermal Model Including Thermal Coupling Effects and Boundary Conditions for Capacitor Banks. In Proceedings of the 2018 International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018 (pp. 2421-2425). [8507401] IEEE. https://doi.org/10.23919/IPEC.2018.8507401