TY - JOUR
T1 - A Multilevel Inverter With Minimized Components Featuring Self-Balancing and Boosting Capabilities for PV Applications
AU - Jahan, Hossein Khoun
AU - Abapour, Mehdi
AU - Zare, Kazem
AU - Hosseini, Seyed Hossein
AU - Blaabjerg, Frede
AU - Yang, Yongheng
PY - 2023/2/1
Y1 - 2023/2/1
N2 - The cascaded H-bridge multilevel inverter (CMI) attracts much attention as a versatile converter in photovoltaic (PV) applications. Requiring several isolated dc sources and many switches are the main demerits of the CMI. In PV applications with the CMI, PV modules can be used as the isolated dc sources, which, however, may contribute to intermodule and grid leakage currents due to the module stray capacitors. In this context, a switched-capacitor (SC)-based cascaded half-bridge multilevel inverter is proposed in this paper to address the above issues. The proposed topology only requires one dc source, and it achieves the minimum number of switches, spontaneous capacitor charging, voltage boosting, and continuous input current. The intermodule leakage currents can also be eliminated in the proposed topology. The feasibility and effectiveness of the proposed topology are validated through simulations and experimental tests.
AB - The cascaded H-bridge multilevel inverter (CMI) attracts much attention as a versatile converter in photovoltaic (PV) applications. Requiring several isolated dc sources and many switches are the main demerits of the CMI. In PV applications with the CMI, PV modules can be used as the isolated dc sources, which, however, may contribute to intermodule and grid leakage currents due to the module stray capacitors. In this context, a switched-capacitor (SC)-based cascaded half-bridge multilevel inverter is proposed in this paper to address the above issues. The proposed topology only requires one dc source, and it achieves the minimum number of switches, spontaneous capacitor charging, voltage boosting, and continuous input current. The intermodule leakage currents can also be eliminated in the proposed topology. The feasibility and effectiveness of the proposed topology are validated through simulations and experimental tests.
KW - Capacitors
KW - Component-count reduction
KW - Inductors
KW - Inverters
KW - Leakage currents
KW - Multilevel inverter
KW - Photovoltaic applications
KW - Switched capacitor module
KW - Switches
KW - Topology
KW - Component-count reduction
KW - Leakage currents
KW - Multilevel inverter (MI)
KW - Photovoltaic applications
KW - Switched capacitor module
KW - leakage currents
KW - multilevel inverter (MI)
KW - photovoltaic (PV) applications
KW - switched capacitor module
UR - http://www.scopus.com/inward/record.url?scp=85148416310&partnerID=8YFLogxK
U2 - 10.1109/JESTPE.2019.2922415
DO - 10.1109/JESTPE.2019.2922415
M3 - Journal article
SN - 2168-6777
VL - 11
SP - 1169
EP - 1178
JO - IEEE Journal of Emerging and Selected Topics in Power Electronics
JF - IEEE Journal of Emerging and Selected Topics in Power Electronics
IS - 1
M1 - 8735794
ER -