A Novel DBC Layout for Current Imbalance Mitigation in SiC MOSFET Multichip Power Modules

Research output: Contribution to book/anthology/report/conference proceedingArticle in proceedingResearchpeer-review

1 Citation (Scopus)

Abstract

This paper proposes a novel Direct Bonded Copper (DBC) layout for mitigating the current imbalance among the paralleled SiC MOSFET dies in multichip power modules. Compared to the traditional layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves the current sharing among the paralleled SiC MOSFET dies in power module. Mathematic analysis and circuit model of the DBC layout are presented to elaborate on the superior features of the proposed DBC layout. Simulation and experimental results further verify the theoretical analysis and current balancing performance of the proposed DBC layout.
Original languageEnglish
Title of host publicationProceedings of the 31st Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
Number of pages5
PublisherIEEE
Publication dateMar 2016
Pages704-708
ISBN (Print)978-1-4673-8393-6, 978-1-4673-9551-9
ISBN (Electronic)978-1-4673-9550-2
DOIs
Publication statusPublished - Mar 2016
Event2016 IEEE Applied Power Electronics Conference and Exposition (APEC) - Long Beach Convention and Entertainment Center, Long Beach, United States
Duration: 20 Mar 201624 Mar 2016
http://www.ieee.org/conferences_events/conferences/conferencedetails/index.html?Conf_ID=32616

Conference

Conference2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
LocationLong Beach Convention and Entertainment Center
Country/TerritoryUnited States
CityLong Beach
Period20/03/201624/03/2016
Internet address

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