Abstract

Integrated Modular Avionics enables applications of different criticality levels to share the same hardware platform with an established temporal and spatial isolation. On-chip communication systems for such platforms must support different bandwidth and latency requirements of applications while preserving time predictability. In this paper, our concern is a time-predictable on-chip network architecture for targeting applications in mixed-criticality aerospace systems. The proposed architecture introduces a mixed, priority-based and time-division-multiplexed arbitration scheme to accommodate different bandwidth and latency in the same network while preserving worst-case time predictability for end-to-end communication without packet loss. Furthermore, as isolation of erroneous transmission by a faulty application is a key aspect of contingency management, the communication system should support isolation mechanisms to prevent interference. For this reason, a sampling port and isolated sampling buffer-based approach is proposed with a transmission authorisation control mechanism, guaranteeing spatial and temporal isolation between communicating systems.
Original languageEnglish
JournalThe Aeronautical Journal
Volume123
Issue number1269
Pages (from-to)1788-1806
Number of pages19
ISSN0001-9240
DOIs
Publication statusPublished - 13 Aug 2019

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Network architecture
Communication systems
Sampling
Bandwidth
Avionics
Packet loss
Hardware
Communication

Cite this

@article{371be2e9ddde4bcba2bc6a76f0c7118c,
title = "A Real-time On-Chip Network Architecture for Mixed Criticality Aerospace Systems",
abstract = "Integrated Modular Avionics enables applications of different criticality levels to share the same hardware platform with an established temporal and spatial isolation. On-chip communication systems for such platforms must support different bandwidth and latency requirements of applications while preserving time predictability. In this paper, our concern is a time-predictable on-chip network architecture for targeting applications in mixed-criticality aerospace systems. The proposed architecture introduces a mixed, priority-based and time-division-multiplexed arbitration scheme to accommodate different bandwidth and latency in the same network while preserving worst-case time predictability for end-to-end communication without packet loss. Furthermore, as isolation of erroneous transmission by a faulty application is a key aspect of contingency management, the communication system should support isolation mechanisms to prevent interference. For this reason, a sampling port and isolated sampling buffer-based approach is proposed with a transmission authorisation control mechanism, guaranteeing spatial and temporal isolation between communicating systems.",
author = "Shibarchi Majumder and Nielsen, {Jens Frederik Dalsgaard} and {la Cour-Harbo}, Anders and Henrik Schi{\o}ler and Thomas Bak",
year = "2019",
month = "8",
day = "13",
doi = "10.1017/aer.2019.80",
language = "English",
volume = "123",
pages = "1788--1806",
journal = "The Aeronautical Journal",
issn = "0001-9240",
publisher = "Cambridge University Press",
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}

A Real-time On-Chip Network Architecture for Mixed Criticality Aerospace Systems. / Majumder, Shibarchi; Nielsen, Jens Frederik Dalsgaard; la Cour-Harbo, Anders; Schiøler, Henrik; Bak, Thomas.

In: The Aeronautical Journal, Vol. 123, No. 1269, 13.08.2019, p. 1788-1806.

Research output: Contribution to journalJournal articleResearchpeer-review

TY - JOUR

T1 - A Real-time On-Chip Network Architecture for Mixed Criticality Aerospace Systems

AU - Majumder, Shibarchi

AU - Nielsen, Jens Frederik Dalsgaard

AU - la Cour-Harbo, Anders

AU - Schiøler, Henrik

AU - Bak, Thomas

PY - 2019/8/13

Y1 - 2019/8/13

N2 - Integrated Modular Avionics enables applications of different criticality levels to share the same hardware platform with an established temporal and spatial isolation. On-chip communication systems for such platforms must support different bandwidth and latency requirements of applications while preserving time predictability. In this paper, our concern is a time-predictable on-chip network architecture for targeting applications in mixed-criticality aerospace systems. The proposed architecture introduces a mixed, priority-based and time-division-multiplexed arbitration scheme to accommodate different bandwidth and latency in the same network while preserving worst-case time predictability for end-to-end communication without packet loss. Furthermore, as isolation of erroneous transmission by a faulty application is a key aspect of contingency management, the communication system should support isolation mechanisms to prevent interference. For this reason, a sampling port and isolated sampling buffer-based approach is proposed with a transmission authorisation control mechanism, guaranteeing spatial and temporal isolation between communicating systems.

AB - Integrated Modular Avionics enables applications of different criticality levels to share the same hardware platform with an established temporal and spatial isolation. On-chip communication systems for such platforms must support different bandwidth and latency requirements of applications while preserving time predictability. In this paper, our concern is a time-predictable on-chip network architecture for targeting applications in mixed-criticality aerospace systems. The proposed architecture introduces a mixed, priority-based and time-division-multiplexed arbitration scheme to accommodate different bandwidth and latency in the same network while preserving worst-case time predictability for end-to-end communication without packet loss. Furthermore, as isolation of erroneous transmission by a faulty application is a key aspect of contingency management, the communication system should support isolation mechanisms to prevent interference. For this reason, a sampling port and isolated sampling buffer-based approach is proposed with a transmission authorisation control mechanism, guaranteeing spatial and temporal isolation between communicating systems.

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DO - 10.1017/aer.2019.80

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SP - 1788

EP - 1806

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IS - 1269

ER -