An analysis of reducing communication delay in network-on-chip interconnect architecture

Hasan Furhad, Mohammad A. Haque, Cheol Hong Kim, Jong Myon Kim*

*Corresponding author

Research output: Contribution to journalJournal articleResearchpeer-review

3 Citations (Scopus)
Original languageEnglish
JournalWireless Personal Communications
Volume73
Issue number4
Pages (from-to)1403-1419
Number of pages17
ISSN0929-6212
DOIs
Publication statusPublished - 1 Dec 2013

Fingerprint

Topology
Communication
Silicon
Packet loss
Oils and fats
Throughput
Network-on-chip

Keywords

  • BFT
  • Mesh
  • Network-on-Chip (NoC)
  • System-on-Chip (SoC)
  • Torus

Cite this

Furhad, Hasan ; Haque, Mohammad A. ; Kim, Cheol Hong ; Kim, Jong Myon. / An analysis of reducing communication delay in network-on-chip interconnect architecture. In: Wireless Personal Communications. 2013 ; Vol. 73, No. 4. pp. 1403-1419.
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An analysis of reducing communication delay in network-on-chip interconnect architecture. / Furhad, Hasan; Haque, Mohammad A.; Kim, Cheol Hong; Kim, Jong Myon.

In: Wireless Personal Communications, Vol. 73, No. 4, 01.12.2013, p. 1403-1419.

Research output: Contribution to journalJournal articleResearchpeer-review

TY - JOUR

T1 - An analysis of reducing communication delay in network-on-chip interconnect architecture

AU - Furhad, Hasan

AU - Haque, Mohammad A.

AU - Kim, Cheol Hong

AU - Kim, Jong Myon

PY - 2013/12/1

Y1 - 2013/12/1

KW - BFT

KW - Mesh

KW - Network-on-Chip (NoC)

KW - System-on-Chip (SoC)

KW - Torus

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DO - 10.1007/s11277-013-1257-y

M3 - Journal article

AN - SCOPUS:84890553339

VL - 73

SP - 1403

EP - 1419

JO - Wireless Personal Communications

JF - Wireless Personal Communications

SN - 0929-6212

IS - 4

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