Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches

Hossein Khoun Jahan; Amin Mohammadpour Shotorbani; Mehdi Abapour; Kazem Zare; Frede Blaabjerg; Yongheng Yang

doi:10.1109/SPEC.2018.8635834

Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches

Hossein Khoun Jahan, Amin Mohammadpour Shotorbani, Mehdi Abapour, Kazem Zare, Frede Blaabjerg, Yongheng Yang

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

2 Citations (Scopus)

Abstract

This paper proposes a novel multilevel inverter. The proposed topology is synthesized with several basic modules and one complementary module. Each basic module is able to realize either a positive or negative voltage level but not a zero voltage level. Therefore, the complementary module, which is able to realize positive, negative, and zero voltage levels, makes up this disability of the basic modules. Using half-bridge cells instead of full-bridge cells, the proposed topology is able to reduce the number of power switches required to construct a multilevel inverter. This topology has a modular structure with symmetric dc sources. Simulation results along with experimental results are provided to validate the feasibility of the proposed topology.

Original language	English
Title of host publication	Proceedings of the IEEE 4th Southern Power Electronics Conference (SPEC 2018)
Number of pages	7
Place of Publication	Singapore
Publisher	IEEE Press
Publication date	Dec 2018
Pages	1-7
ISBN (Print)	978-1-5386-8257-9
ISBN (Electronic)	978-1-5386-8258-6
DOIs	https://doi.org/10.1109/SPEC.2018.8635834
Publication status	Published - Dec 2018
Event	The 4th IEEE Southern Power Electronics Conference, SPEC 2018 - Nanyang Technological University, Singapore Duration: 10 Dec 2018 → 13 Dec 2018

Conference

Conference	The 4th IEEE Southern Power Electronics Conference, SPEC 2018
Location	Nanyang Technological University
Country/Territory	Singapore
Period	10/12/2018 → 13/12/2018

Keywords

multilevel inverter
cascaded H-bridge inverter
component reduction

Access to Document

10.1109/SPEC.2018.8635834

AUB Link

Search for the material in Aalborg University Library's search engine

Cite this

@inproceedings{9bfd1cd3fa9c4945b65d4c7b55542acd,

title = "Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches",

abstract = "This paper proposes a novel multilevel inverter. The proposed topology is synthesized with several basic modules and one complementary module. Each basic module is able to realize either a positive or negative voltage level but not a zero voltage level. Therefore, the complementary module, which is able to realize positive, negative, and zero voltage levels, makes up this disability of the basic modules. Using half-bridge cells instead of full-bridge cells, the proposed topology is able to reduce the number of power switches required to construct a multilevel inverter. This topology has a modular structure with symmetric dc sources. Simulation results along with experimental results are provided to validate the feasibility of the proposed topology.",

keywords = "multilevel inverter, cascaded H-bridge inverter, component reduction",

author = "{Khoun Jahan}, Hossein and Shotorbani, {Amin Mohammadpour} and Mehdi Abapour and Kazem Zare and Frede Blaabjerg and Yongheng Yang",

year = "2018",

month = dec,

doi = "10.1109/SPEC.2018.8635834",

language = "English",

isbn = "978-1-5386-8257-9",

pages = "1--7",

booktitle = "Proceedings of the IEEE 4th Southern Power Electronics Conference (SPEC 2018)",

publisher = "IEEE Press",

note = "The 4th IEEE Southern Power Electronics Conference, SPEC 2018, SPEC 2018 ; Conference date: 10-12-2018 Through 13-12-2018",

}

Khoun Jahan, H, Shotorbani, AM, Abapour, M, Zare, K, Blaabjerg, F & Yang, Y 2018, Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches. in Proceedings of the IEEE 4th Southern Power Electronics Conference (SPEC 2018). IEEE Press, Singapore, pp. 1-7, The 4th IEEE Southern Power Electronics Conference, SPEC 2018, Singapore, 10/12/2018. https://doi.org/10.1109/SPEC.2018.8635834

Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches. / Khoun Jahan, Hossein; Shotorbani, Amin Mohammadpour; Abapour, Mehdi et al.
Proceedings of the IEEE 4th Southern Power Electronics Conference (SPEC 2018). Singapore: IEEE Press, 2018. p. 1-7.

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

TY - GEN

T1 - Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches

AU - Khoun Jahan, Hossein

AU - Shotorbani, Amin Mohammadpour

AU - Abapour, Mehdi

AU - Zare, Kazem

AU - Blaabjerg, Frede

AU - Yang, Yongheng

PY - 2018/12

Y1 - 2018/12

N2 - This paper proposes a novel multilevel inverter. The proposed topology is synthesized with several basic modules and one complementary module. Each basic module is able to realize either a positive or negative voltage level but not a zero voltage level. Therefore, the complementary module, which is able to realize positive, negative, and zero voltage levels, makes up this disability of the basic modules. Using half-bridge cells instead of full-bridge cells, the proposed topology is able to reduce the number of power switches required to construct a multilevel inverter. This topology has a modular structure with symmetric dc sources. Simulation results along with experimental results are provided to validate the feasibility of the proposed topology.

AB - This paper proposes a novel multilevel inverter. The proposed topology is synthesized with several basic modules and one complementary module. Each basic module is able to realize either a positive or negative voltage level but not a zero voltage level. Therefore, the complementary module, which is able to realize positive, negative, and zero voltage levels, makes up this disability of the basic modules. Using half-bridge cells instead of full-bridge cells, the proposed topology is able to reduce the number of power switches required to construct a multilevel inverter. This topology has a modular structure with symmetric dc sources. Simulation results along with experimental results are provided to validate the feasibility of the proposed topology.

KW - multilevel inverter

KW - cascaded H-bridge inverter

KW - component reduction

U2 - 10.1109/SPEC.2018.8635834

DO - 10.1109/SPEC.2018.8635834

M3 - Article in proceeding

SN - 978-1-5386-8257-9

SP - 1

EP - 7

BT - Proceedings of the IEEE 4th Southern Power Electronics Conference (SPEC 2018)

PB - IEEE Press

CY - Singapore

T2 - The 4th IEEE Southern Power Electronics Conference, SPEC 2018

Y2 - 10 December 2018 through 13 December 2018

ER -

Cascaded Half-Bridge Multilevel Inverter with Reduced Number of Power Switches

Abstract

Conference

Keywords

Access to Document

AUB Link

Fingerprint

Cite this