Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control

Seyed Fariborz	 Zarei; Mohammad Amin Ghasemi; Saeed Peyghami; Pooya Davari; Hossein Mokhtari; Frede Blaabjerg

doi:10.1109/COMPEL.2018.8460151

Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control

Seyed Fariborz Zarei, Mohammad Amin Ghasemi, Saeed Peyghami, Pooya Davari, Hossein Mokhtari, Frede Blaabjerg

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

9 Citations (Scopus)

319 Downloads (Pure)

Abstract

Voltage unbalance and short circuits in distribution networks adversely affect the performance of grid-tied voltage source inverters (VSIs). Consequently, the dc-link voltage ripple may significantly increase leading to operation of VSI in an unsatisfactory manner. Conventionally in order to maintain the negative sequence current under unbalanced conditions, low-pass/trap filter in the current control loop are required which significantly reduce the controller bandwidth. In order to minimize the dc-link voltage ripple without impairing the controller bandwidth, this paper investigates the design and performance of Proportional-Integral-Resonant (PIR) controller in improving the performance of the VSI under unbalanced condition. The proposed design methodology is validated through simulations and experimental results.

Original language	English
Title of host publication	Proceedings of the 19th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2018)
Number of pages	8
Publisher	IEEE Press
Publication date	Jun 2018
Pages	1-8
Article number	8460151
ISBN (Print)	978-1-5386-5542-9
ISBN (Electronic)	978-1-5386-5541-2
DOIs	https://doi.org/10.1109/COMPEL.2018.8460151
Publication status	Published - Jun 2018
Event	19th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2018 - Padova, Italy Duration: 25 Jun 2018 → 28 Jun 2018

Conference

Conference	19th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2018
Country/Territory	Italy
City	Padova
Period	25/06/2018 → 28/06/2018

Keywords

grid-tied VSI
unbalanced AC grid
DC link voltage control
unbalanced voltage sag

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10.1109/COMPEL.2018.8460151

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Cite this

@inproceedings{7dbbfc087afa4185acf360b694c0dbdf,

title = "Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control",

abstract = "Voltage unbalance and short circuits in distribution networks adversely affect the performance of grid-tied voltage source inverters (VSIs). Consequently, the dc-link voltage ripple may significantly increase leading to operation of VSI in an unsatisfactory manner. Conventionally in order to maintain the negative sequence current under unbalanced conditions, low-pass/trap filter in the current control loop are required which significantly reduce the controller bandwidth. In order to minimize the dc-link voltage ripple without impairing the controller bandwidth, this paper investigates the design and performance of Proportional-Integral-Resonant (PIR) controller in improving the performance of the VSI under unbalanced condition. The proposed design methodology is validated through simulations and experimental results.",

keywords = "grid-tied VSI, unbalanced AC grid, DC link voltage control, unbalanced voltage sag",

author = "Zarei, {Seyed Fariborz} and Ghasemi, {Mohammad Amin} and Saeed Peyghami and Pooya Davari and Hossein Mokhtari and Frede Blaabjerg",

year = "2018",

month = jun,

doi = "10.1109/COMPEL.2018.8460151",

language = "English",

isbn = "978-1-5386-5542-9",

pages = "1--8",

booktitle = "Proceedings of the 19th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2018)",

publisher = "IEEE Press",

note = "19th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2018 ; Conference date: 25-06-2018 Through 28-06-2018",

}

Zarei, SF, Ghasemi, MA, Peyghami, S , Davari, P, Mokhtari, H & Blaabjerg, F 2018, Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control. in Proceedings of the 19th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2018)., 8460151, IEEE Press, pp. 1-8, 19th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2018, Padova, Italy, 25/06/2018. https://doi.org/10.1109/COMPEL.2018.8460151

Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control. / Zarei, Seyed Fariborz ; Ghasemi, Mohammad Amin; Peyghami, Saeed et al.
Proceedings of the 19th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2018). IEEE Press, 2018. p. 1-8 8460151.

Research output: Contribution to book/anthology/report/conference proceeding › Article in proceeding › Research › peer-review

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T1 - Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control

AU - Zarei, Seyed Fariborz

AU - Ghasemi, Mohammad Amin

AU - Peyghami, Saeed

AU - Davari, Pooya

AU - Mokhtari, Hossein

AU - Blaabjerg, Frede

PY - 2018/6

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N2 - Voltage unbalance and short circuits in distribution networks adversely affect the performance of grid-tied voltage source inverters (VSIs). Consequently, the dc-link voltage ripple may significantly increase leading to operation of VSI in an unsatisfactory manner. Conventionally in order to maintain the negative sequence current under unbalanced conditions, low-pass/trap filter in the current control loop are required which significantly reduce the controller bandwidth. In order to minimize the dc-link voltage ripple without impairing the controller bandwidth, this paper investigates the design and performance of Proportional-Integral-Resonant (PIR) controller in improving the performance of the VSI under unbalanced condition. The proposed design methodology is validated through simulations and experimental results.

AB - Voltage unbalance and short circuits in distribution networks adversely affect the performance of grid-tied voltage source inverters (VSIs). Consequently, the dc-link voltage ripple may significantly increase leading to operation of VSI in an unsatisfactory manner. Conventionally in order to maintain the negative sequence current under unbalanced conditions, low-pass/trap filter in the current control loop are required which significantly reduce the controller bandwidth. In order to minimize the dc-link voltage ripple without impairing the controller bandwidth, this paper investigates the design and performance of Proportional-Integral-Resonant (PIR) controller in improving the performance of the VSI under unbalanced condition. The proposed design methodology is validated through simulations and experimental results.

KW - grid-tied VSI

KW - unbalanced AC grid

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KW - unbalanced voltage sag

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SN - 978-1-5386-5542-9

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BT - Proceedings of the 19th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2018)

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Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control

Abstract

Conference

Keywords

Access to Document

AUB Link

Other files and links

Fingerprint

Improvement of AC-DC multi-terminal microgrids’ protection against short circuit

REPEPS: REliable Power Electronic based Power System

Multi-Physics of High Power Density Power Electronic Systems

Cite this

Characterization of Proportional-Integral-Resonant Compensator for DC Link Voltage Control

Abstract

Conference

Keywords

Access to Document

AUB Link

Other files and links

Fingerprint

Projects

Improvement of AC-DC multi-terminal microgrids’ protection against short circuit

REPEPS: REliable Power Electronic based Power System

Multi-Physics of High Power Density Power Electronic Systems

Cite this