Common mode current mitigation for medium voltage half bridge SiC modules

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Abstract

Medium voltage 10 kV Silicon Carbide MOSFETs, introduce challenges regarding converter design. Very high rate of voltage change and capacitive couplings to for example cooling systems cause increased electromagnetic interference. The aim of this paper is to accurately model the capacitive coupling to a heat sink and experimentally validate the model. An analytic model of the heat sink is developed which is demonstrated to be in excellent agreement with experimental results. The experimental result validates the modelled heat sink network allowing engineers to choose a suitable grounding impedance to comply with the electromagnetic compatibility regulations.
Original languageEnglish
Title of host publicationProceedings of 2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe)
Number of pages8
PublisherIEEE Press
Publication dateSep 2017
ISBN (Electronic)978-90-75815-27-6
DOIs
Publication statusPublished - Sep 2017
Event2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe) - Warsaw, Poland
Duration: 11 Sep 201714 Sep 2017

Conference

Conference2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe)
Country/TerritoryPoland
CityWarsaw
Period11/09/201714/09/2017

Keywords

  • Wide bandgap devices
  • Silicon Carbide (SiC)
  • EMC/EMI
  • Noise
  • New switching devices

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